Xilinx Academy 1 IP for Xilinx Academy Training Core Solutions: Products:

Xilinx Academy 2  Cores are mainstream for 70K+ gate ASICs  Million gate FPGAs are here —Requires new design methods  Cores essential to maintain time-to-market value of FPGAs —reduce design risk —reduce compile time High-density FPGA design Bus Interfaces Memory Interfaces App Specific Modules Processor Interfaces DMA Modules Custom Design Example system on an FPGA

Xilinx Academy 3 Design From Scratch Reference Design, Generic Core Complete FPGA Core Solution Pre-verified Designs Area & Timing Optimized Complete & Flexible Design Little Knowledge of Function Required Complete Core Solutions Reduce Time to Market L Design D Verify V Learn V I Implement I L D 2 Months 9 Months 12 Months

Xilinx Academy 4  Assumptions —Sr. design engineer ($20K/mo burdened cost) —Design rate ~ 5 CLBs/day –Functional & timing simulation –Placed, routed, hardware tested  Cost Analysis —250 CLBs*(1day/5CLBs)*(1mo/21days)= 2.4 mo —2.4mo*$20K/mo = $48,000 Co$t of Core Development

Xilinx Academy 5 Xilinx CORE Solutions Products Reference Designs A core sold, distributed and supported by Xilinx. Core enabling technologies designed to ease both the develop- ment and the use of FPGA-based cores (i.e. CORE Generator) A core sold, distributed and supported by a Xilinx AllianceCORE partner. The core has gone through Xilinx productization process before promotion by Xilinx. Untested design example and application note available from Xilinx, unsupported and free of charge. Xilinx Program for Engineering Resources from Third Parties - Certified consultants to aid in design and IP integration.

Xilinx Academy 6 Important CORE Solutions Contacts  LogiCORE Products — Marketing : Per Holmberg, — PCI Applications : Jim McManus, — DSP Applications : Sabine Lam,  Vertical Markets — Marketing : Paul Laity,  AllianceCORE Products — Marketing : Mark Bowlby, — Applications : Anil T.L.N.,  XPERTS Program — Marketing : Umesh Bhat,

Xilinx Academy 7 Partnerships for Complete Programmable Logic Solutions Program Info:

Xilinx Academy 8 An AllianceCORE $uccess! Reed Solomon  Customer: Wavtrace —Existing Altera user - not Xilinx —Looking at LSI Logic for Reed Solomon Core —Altera and Xilinx both offered ISS core —Under pricing pressure, Altera offered own core  The Result - Xilinx and ISS Win! —Communication was key —Complete solution = HardWire + ISS cores —8 software seats + 20 sockets —4 month process  What Can We Learn? —Win the core, win the war —ISS solution better than LSI’s PARTNER:

Xilinx Academy 9 Merged with… G & Associates V Partners* *As of November, 1998

Xilinx Academy 10 Core Productization Process  Core Selection —The right cores for programmable logic — Benefit: A practical programmable logic core  Core Qualification —Available in a Xilinx-optimized format with constraints —Xilinx Flow Checks netlist version to verify density/performance (not source code) —Xilinx DOES NOT verify internal functionality — Benefit: Low risk  Core Integration —Support tools (i.e. hardware/software) —Documentation and application support — Benefits: Fast integration, time-to-market

Xilinx Academy 11 AllianceCORE Product Stages To ensure high-quality 3rd-party cores Productization Process IP1IP2IP3 IP4IP5IP6 3rd Party AllianceCORE Partner AllianceCORE Partner ApplyAcceptedProducing Products and Expertise Company Status Activity Status Stage 1Stage 2Stage 3 IP1IP2IP3 IP4IP5IP6 IP1IP2IP3 IP4IP5IP6 Released AllianceCORE Products IP1 IP5

Xilinx Academy 12 Basics of Using the Program  Core Partnerships are Relatively New —It’s natural to have questions  The Time to Start is Now —We sell time-to-market —Big devices need (many) cores —Cannot continue to, without 3rd-party cores —Customers are interested  We Learn to use this Together —Field, factory and partners

Xilinx Academy 13 First Sales Scenario You and customer identify a need 1. Download Data Sheet from WebLINX —Call factory if needed 2.Contact Partner —Identify yourself as Xilinx representative —Describe opportunity —Decide if there is a fit 3.Set up a Conference Call 4.Stay Involved and Communicate

Xilinx Academy 14 Second Sales Scenario Customer has already contacted partner  Insert Yourself into the Process —Find out the status  Introduce Yourself to Partner —Begin and maintain communication  Stay Involved and Communicate

Xilinx Academy 15 Lead Registration Guidelines Rules for Partners and Xilinx  Whoever Brings Lead First (Xilinx or Partner), Owns It —First requested vendor is co-owner  Only offer requested solution(s) —Get other party(s) involved —Tell if customer later asks for competing solution —Open game if original request not vendor-specific  Cooperate and Communicate —Help us learn as we go

Xilinx Academy 16 Acquiring AllianceCORE Products  Purchase made directly with Partner  Xilinx Netlist version $ < Source Code $ —Netlist restricted for use in Xilinx —Always ask which version the partner is quoting  Partner guarantees functionality  Licensing varies —Single use —Multi-use site license

Xilinx Academy 17 Recommendations  Analyze the needs of your customer base  Find partners with expertise in those areas  Get to know two or three proactively —Call or visit them —Which one are in your area? —Start a relationship —25+ partners is too many

Xilinx Academy 18 Virtex Status  Many Partners are trained on Virtex —Partner-specific training occurred December 1998 —Ongoing training of others  Virtex is becoming a de-facto IP platform  All NEW partner core development is on Virtex —Always ASK partner about Virtex availability of a core —Current 4K cores being converted

Xilinx Academy 19 Released Products* Bus Interfaces CAN FireWire (IEEE 1394) I 2 C (2 types) PCMCIA (2 types) USB (3 types) Communications ATM Cell Assembler ATM Cell Delineation 10/100 Ethernet MAC CRC (10- & 32-bit) DES Engine (2 partners) HDLC (2 types) Reed Solomon (2 partners) T1 Framer UTOPIA (master & slave) Viterbi Decoder Image Processing YUV to RGB Processor Peripherals UARTs (7 types) A (3 partners) (2 partners) DRAM Controller SDRAM Controller RISC Processors (2 types) Demo Boards & Software (15) *As of February 1999

Xilinx Academy 20 AllianceCORE Guidelines  Check WebLINX FIRST for core availability  Xilinx flow checks netlist, not source code  Partner guarantees functionality  Work with partner  Honor leads owned by the partner  Know if partner is quoting source code or netlist  Get to know a few of them