COE 202: Digital Logic Design Combinational Logic Part 4

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Presentation transcript:

COE 202: Digital Logic Design Combinational Logic Part 4 Courtesy of Dr. Ahmad Almulhem KFUPM

Objectives Other Gate Types NAND NOR More Gates Types XOR XNOR KFUPM

More Gates: NAND - NOR X Y Z=(XY)’ 1 X Y Z NAND F = (XY)’ X Y Z=(X+Y)’ 1 X Y Z NOR F = (X+Y)’ Sometimes it is desirable to build circuits using NAND gates only or NOR gates only KFUPM

NAND Gate is Universal NOT X X’ X X AND X Y XY OR X Y X+Y Therefore, we can build all functions we learned so far using NAND gates ONLY (Exercise: Prove that NOT can be built with NAND) NAND is a UNIVERSAL gate KFUPM

Graphic Symbols for NAND Gate Two equivalent graphic symbols or shapes for the SAME function X Y Z AND-NOT (XYZ)’ X Y Z NOT-OR X’+Y’+Z’ = (XYZ)’ AND-NOT = NOT-OR KFUPM

Implementation using NANDs Example: Consider F = AB + CD F B A D C NAND F B A D C Proof: F = ((AB)’.(CD)’)’ = ((AB)’)’ + ((CD)’)’ = AB + CD F B A D C KFUPM

Implementation using NANDs Consider F =Σm(1,2,3,4,5,7) – Implement using NAND gates F Y’ X Y X’ Z Y=1 YZ X 00 01 11 10 1 X=1 Y’ X Z=1 F X’ F(X,Y) = Z+XY’+X’Y Y Z’ KFUPM

Rules for 2-Level NAND Implementations Simplify the function and express it in sum-of- products form Draw a NAND gate for each product term (with 2 literals or more) Draw a single NAND gate at the 2nd level (in place of the OR gate) A term with single literal requires a NOT What about multi-level circuits? KFUPM

NOR Gate is Universal X’ X X’ X NOT X X Y XY X Y (X’+Y’)’ = XY AND X Y X+Y X Y (X+Y)’’ = X+Y OR Therefore, we can build all functions we learned so far using NOR gates ONLY (Exercise: Prove that NOT can be built with NOR) NOR is a UNIVERSAL gate KFUPM

Graphic Symbols for NOR Gate Two equivalent graphic symbols or shapes for the SAME function (X+Y+Z)’ OR-NOT X Y Z (X’Y’Z’)=(X+Y+Z)’ NOT-AND X Y Z OR-NOT = NOT-AND KFUPM

Implementation using NOR gates Consider F = (A+B)(C+D)E NOR NOR F B A D C E F B A D C E’ KFUPM

Implementation using NOR gates Consider F =Σm(1,2,3,5,7) – Implement using NOR gates F Z X’ Y Y=1 YZ X 00 01 11 10 1 X=1 X’ Z=1 Z F Y F’(X,Y) = Y’Z’+XZ’, or F(X,Y) = (Y+Z)(X’+Z) Z KFUPM

Rules for 2-Level NOR Implementations Simplify the function and express it in product of sums form Draw a NOR gate (using OR-NOT symbol) for each sum term (with 2 literals or more) Draw a single NOR gate (using NOT-AND symbol) the 2nd level (in place of the AND gate) A term with single literal requires a NOT What about multi-level circuits? KFUPM

Different symbols for XNOR More Gates: XOR - XNOR X Y Z=XY 1 Exclusive OR (XOR) X Y Z F = X’Y + XY’ = X  Y Exclusive NOR (XNOR) X Y Z F = XY + X’Y’ = (X  Y)’ = X  Y = X Y X Y Z=(XY)’ 1 Different symbols for XNOR KFUPM

XOR/XNOR Properties X  0 = X X  0 = X’ X  1 = X’ X  1 = X X  Y’ = X’  Y = (X  Y)’ = X  Y X  Y = X’  Y’ (same with XNOR) X  Y = Y  X (commutative, same with XNOR) X  (Y  Z) = (X  Y)  Z (associative, same with XNOR) KFUPM

Odd Parity Function The XOR of an n-input function: F = XY Z is equal to 1 if and only if an odd number of variables of the function have a value of 1 X Y Z F 1 The Exclusive OR of a function acts as an ODD detector. It is 1 only if the number of 1’s in the input is odd. X Y Z KFUPM

4-Input XOR = 4-input odd parity checker Odd Parity Function 4-Input XOR = 4-input odd parity checker KFUPM

Even Parity function Is equal to 1 if and only if the total number of 1’s in the input is an even number Obtained by placing an inverter in front of the odd function X Y Z F 1 X Y Z KFUPM

Conclusion The universal gates NAND and NOR can implement any Boolean expression NAND gates (2-level SOP) NOR gates (2-level POS) XOR and OR gates KFUPM