Lecture 4 Chap 5 Types Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University.

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Lecture 4 Chap 5 Types Instructors: Fu-Chiung Cheng ( 鄭福炯 ) Associate Professor Computer Science & Engineering Tatung University

Operator Precedence Miscellaneous **, abs, not multiplying*, /, mod, rem sign+, - adding+, - shiftingsll, srl, sla, sra, ror, rol relational=, /=,, >= logicaland, or, nand, nor, xor, xnor

Operator Precedence Logical operators are the lowest precedence. Logical operators have the same precedence It is impossible to mix logic operators. a <= b or c and d -- illegal a <= (b or c) and d -- OK nand and nor cannot be chained y <= a nand b nand c -- illegal y <= (a nand b) nand c -- OK y <= a or b or c -- OK A. nand and nor are non-associative operators B. non-inverting operators are associative

Shift operators Don’t mix Shift operators a sll 2 srl 2; -- illegal (a sll 2) srl 2; -- OK use parentheses (strip off the leftmost two bits of bus a) shift > logical if a sll 2 > 5 then … if (a sll 2) > 5 then

Signed + and - a + -b; -- illegal. -a + b; -- OK (-a)+b signed +,- > +,- -a*b; -- OK -(a*b) signed +,- < *,/ a + b*c; --OK a+(b*c); -a mod b; -- OK -(a mod b); a = 3 b=4 -a mod 4 = -3 (-a) mod 4 = 1 a ** b ** c ==> a ** (b ** c)

Boolean operators Boolean expression are transferred to sum-of-prducts form. Example: a nand b ==> not a or not b a nor b ==> not a and not b a xor b ==> (not a and b) or (a and not b) a xnor b ==> (a and b) or (not a and not b) (equal)

Comparison Operators equality test: = and /=xnor gates ordering test:, >=subtractor 4-bit equality:

Comparison Operators 4-bit ordering tester a<b: use subtractor a-b a<b if msb=1 optimization can be achieved by removed the unused subtractor outputs. other ordering test conversion: A. a >b ==> b<a B. a >=b ==> not (a <b) C. a not (b<a) a <0: check the msb bit. a>=0: check the msb bit.

Array Comparison Operators Array equality: if a’length /= b’length then a /= b if a’length = b’length Array inequality = not (array equality).

Array Comparison Operators Array less-than: a(2 downto 0) < b(3 downto 0)

Shift operators Shift left logical 4 bit (sll 4):

Shift operators Shift right logical 4 bit (srl 4):

Shift operators Shift left arithemetic 4 bit (sla 4):

Shift operators Shift right 4 arithmetic bit (sra 4):

Shift operators rotate left 1 bit (rol 1):

Shift operators rotate right 1 bit (ror 1):

Arithmetic operators: + addition - subtraction + plus sign - minus sign * multiplication / division mod modulo arithmetic rem remainder after division ** exponentiation abs absolute value

Arithmetic operators: plus sign Implement: wire (no circuitry).

Arithmetic operators: minus sign Implement: 2’s-complementor A. 1’s complement B Use ripple-borrow subtractors. Half-Subtractor: dif <= x xor bi; bo <= x or bi; Truth table:

Arithmetic operators: minus sign 4-bit 2’s-complementor:

Arithmetic operators: abs Implement: mux + two complementor.

Arithmetic operators: adder Implement: ripple-carry adder. Full-Adder: sum <= x xor y xor ci; co <= (x and y) or (x and ci) or (y and ci);

Arithmetic operators: subtracter Implement: ripple-borrow subtracter. Full-subtracter: dif <= x xor y xor ci; bo <= (not x and y) or (not x and bi) or (y and bi);

Arithmetic operators: multiplier Implement: array multiplier see pp. 94 and 95

Arithmetic operators: divisor Not fully implementation, support only divide by 2^k Implement: shifter (unsigned division by 2)

Arithmetic operators: divisor Not fully implementation, support only divide by 2^k Implement: shifter + mux (signed division)

Arithmetic operators: modulo modulo is similar to division (not fully support). Implement: wire (unsigned and unsigned modulo by 128)

Arithmetic operators: remainder Implement: mux + modulo

Exponentiation operator: Implement: only x**2 is allowed. X**2 = x*x

Concatenation operator: conatenation operator allow an array to be built up out of smaller arrays. Implement: not circuitry required Example: signal a,b : std_logic_vector(15 downto 0); signal z: std_logic_vector(31 downto 0); … z <= a & b;