Embedded Signal Processing Prof. Brian L. Evans November 21,

2 On My Way to Austin… Signals and Systems Pack Symbolic analysis of signals and systems in Mathematica By product of my PhD work On market since 1995 Ptolemy Classic Mixes models of computation Untimed dataflow Process network Discrete-event Untimed dataflow synthesis Source code powers Agilent Advanced Design System

3 Embedded Signal Processing Lab Develop and Disseminate Theoretical bounds on signal/image quality Optimal and low-complexity algorithms using bounds Algorithm suites and fixed-point, real-time prototypes Analog/Digital IIR Filter Design for Implementation Butterworth and Chebyshev filters are special cases of Elliptic filters Minimum order does not always give most efficient implementation Control quality factors

4 Image Analysis Ph.D. graduates: Dong Wei (SBC Research) K. Clint Slatton (University of Florida) Wade C. Schwartzkopf (Integrity Applications) Real-Time Imaging Ph.D. students: Gregory E. Allen (UT Applied Research Labs) Serene Banerjee MS students: Vishal Monga Ph.D. graduates: Thomas D. Kite (Audio Precision) Niranjan Damera-Venkata (HP Labs) MS graduates: Young Cho (UCLA) Ph.D. students: Dogu Arifler Ming Ding Ph.D. graduates: Güner Arslan (Cicada) Biao Lu (Schlumberger) Milos Milosevic (Schlumberger) ADSL/VDSL Transceiver Design Wireless Communications Ph.D. students: Kyungtae Han Zukang Shen MS students: Ian Wong (NI Summer Intern) Ph.D. graduate: Murat Torlak (UT Dallas) MS graduates: Srikanth K. Gummadi (TI) Amey A. Deosthali (TI) Wireless Networking and Comm. Group: Center for Perceptual Systems: Students & Alumni

5 Senior Real-time DSP Lab Elective Lab #6: Quadrature Amplitude Modulation Transmitter Serial/parallel converter Map to 2-D constellation Impulse modulator Pulse shaper g T (t) Local Oscillator + 90 o Pulse shaper g T (t) d[n]d[n] anan bnbn a*(t)a*(t) b*(t)b*(t) s(t)s(t) 1J Delay Bit stream FIR filter Transmitted signal

6 Senior Real-time DSP Lab Elective Deliverable: V.22bis Voiceband Modem Design of sinusoidal generators, filters, etc. Program in C on TI DSP processor using Code Composer Studio Test implementation with spectrum analyzers, etc. Reference Design in LabVIEW Allows Students To Explore communication performance tradeoffs vs. parameters See relationships among modem subsystems in block diagram LabVIEW DSP Integration Toolkit 2.0 for Spring 2004 Interacts with Code Composer Studio for real-time debugging info Enables all test and measurement to be performed on desktop PC Course alumni Prethi Gopinath and Newton Petersen at NI

7 LabVIEW Interface Control Panel Eye diagram QAM Passband Signal

8 Multicarrier Modulation Divide broadband channel into narrowband subchannels No inter-symbol interference if constant subchannel gain and ideal sampling Based on fast Fourier transform (FFT) Standardized in ADSL/VDSL (wired) and IEEE a/g & a (wireless) subchannel frequency magnitude carrier DTFT -1 pulse sinc  k cc  c channel In ADSL/VDSL, each subchannel is 4.3 kHz wide and carries a QAM encoded subsymbol

9 P/S QAM demod decoder invert channel = frequency domain equalizer S/P quadrature amplitude modulation (QAM) encoder mirror data and N -IFFT add cyclic prefix P/S D/A + transmit filter N -FFT and remove mirrored data S/P remove cyclic prefix TRANSMITTER RECEIVER N/2 subchannelsN real samples N/2 subchannels time domain equalizer (FIR filter) receive filter + A/D channel ADSL Transceiver: Data Transmission Bits conventional ADSL equalizer structure

10 Contributions by Research Group New Time-Domain Equalizer Design Methods Maximum Bit Rate gives an upper bound Minimum Inter-Symbol Interference method (amenable to real-time, fixed-point implementation) Minimum Inter-Symbol Interference Method Reduces number of TEQ taps by a factor of ten over Minimum Mean Squared Error method for same bit rate Implemented in real-time on Motorola 56300, TI TMS320C6200 and TI TMS320C5000 DSPs

11 Wireless Multicarrier Modulation P/S QAM demod decoder freq. domain equalizer S/P quadrature amplitude modulation (QAM) encoder N-point inverse FFT add cyclic prefix P/S D/A + transmit filter N-point FFT S/P remove cyclic prefix TRANSMITTER RECEIVER receive filter + A/D multipath channel Bits Orthogonal frequency division multiplexing (OFDM)

12 OFDM Simulation in LabVIEW IEEE a Standard Fixed broadband wireless system High speed wireless access from home or office IEEE a Simulation Physical layer communication Realistic channel models Channel estimation Authored by Alden Doyle, Kyungtae Han, Ian Wong

13 Possible LabVIEW Extensions Add communication system design/simulation support for Drop down and “click to configure” communication building blocks Multicarrier systems and error control coding Performance visualization mechanisms for communication systems performance analysis (BER curves, eye diagrams, etc.) Text-based algorithm design environment For quick calculations and parameter calculations Implement a text-to-VI translation tool, e.g. convert math script “x = [1:10]; y = fft(x)” to a VI implementation Improve optimization toolkit Make it easier to use Add supports for more extensive set of algorithms

14 Fixed-Point Wordlength Optimization Problem: Manual floating-to-fixed point conversion for digital hardware implementation Design time grows exponentially with number of variables Time consuming Error prone Goal: Develop fast algorithm to optimize fixed-point wordlengths Minimize hardware complexity Maximize application performance Solution: Simulation-based search Determine minimum wordlength Greedy search algorithm Complexity-and-distortion measure Wordlength(w) Complexity Error [1/performance] Optimum wordlength

15 Wordlength Optimization In LabVIEW Use broadband wireless access demodulator design Pick four variables and build fixed-point type Manually estimate maximum and minimum values of these variables for integer wordlength determination Optimize these variables using Greedy search algorithm with complexity-and-distortion measure Design

16 Possible LabVIEW Extensions Add fixed-point data type Build fixed-point arithmetic operations, filtering operations, etc. Estimate implementation complexity as function of input wordlengths in blocks Automatically estimate or log max and min values on arcs Implement wordlength search algorithms Design MaxMinIWL w0w W1W W2W