HW/SW Codesign of Embedded Systems Winter-Spring 2001 Computer Engineering Dept. Sharif University of Technology Maziar Gudarzi

Winter-Spring What will be covered Introduction to Embedded Systems HW/SW Codesign Flow Review and Comparison of System Specification Languages HW Design Using SystemC System Design Using C++/SystemC Co-synthesis Algorithms Brief Introduction to Other Topics in Codesign SoC, Component-based Design, Platform-based Design, ASIPs, Retargettable Compilers

Winter-Spring Course Grading Exams Quizzes Final exam Homework Project Paper presentation (optional-additional grade)

Winter-Spring What you should do Homework HW design (VHDL/Verilog, SystemC) System design (C++/SystemC) Algorithm Implementation Read and summarize selected papers Project Getting familiar with one of the academic codesign tools + Implementation of a typical system on it Other topics (after instructor approval)

Winter-Spring What you should do (cont.) For project: Phase zero: Select your partner(s) Submit list of your group members (2-3 per group) Phase one Collect relating tools, papers, any other references Submit a brief (2-3 pages) document containing List of your collected material Your plan for next phases Role of each person

Winter-Spring What you should do (cont.) Phase two Study the references Acquire hands-on experience with the tool Implement a simple example of your choice Prepare presentations of what you’ve learned Oral presentation using PowerPoint (15 min.) and present it in class Written document. Actually, one part of your final paper. Phase three Implement and optimize the System-Under-Design Report achieved results in a paper-like report, containing: Introduction to the methodology behind the tool (Phase 2) Brief review of the SUD Achieved implementation results

Winter-Spring Let’s be JIT (Just In-Time) For project: In 1 st phase and written part of 2 nd phase 5% penalty per day for being late In oral presentation of 2 nd phase No late presentation is possible. In final report No late submission is accepted.

Winter-Spring Let’s be JIT (Just In-Time) For homework 5% penalty per day for being late

Winter-Spring Laboratory hours More than 3 hours per week is required. Currently reserved hours: Saturdays7:30-10:30 Mondays12:00-14:30 Wednesdays7:30-10:30 TAs M. Sh.

Winter-Spring Tools to work with HW design, synthesis, and simulate tools Renoir, ModelSim, LeonardoSpectrum C++Builder 5.0 (for SystemC) System design C++Builder 5.0

Winter-Spring Important dates Final exam Project Group Members List Resource Collection Report Tool Familiarization Report Final System Implementation Report Homework

Winter-Spring References Text book: J. Staunstrup, W. Wolf, "Hardware/Software Codesign: Principles and Practice", Kluwer Academic Publishers, Other references: W. Wolf, “Computers as Components: Principles of Embedded Computing System Design”, Morgan Kaufman Publishers, G. DeMicheli, "Hardware/Software Codesign", Kluwer Academic Publishers, 1996.

Winter-Spring References (cont.) S. Kumar, S. Klumar, “The Codesign of Embedded Systems: A Unified Hardware/Software Representation”, Kluwer Academic Publishers, H. Chang, et al, “Surviving SoC Revolution”, Kluwer Academic Publishers, F. Balarin et al, "Hardware/Software Codesign: The POLIS Approach", Kluwer Academic Publishers, Papers from IEEE/ACM sponsored journals, Conferences, and Workshops

Winter-Spring Very Important Notes Honor code 200% penalty for both copier and copy- giver. Devise a plan for your project Very strictly follow your plan NO LATE ORAL PRESENTATION/FINAL REPORT WILL BE ACCEPTABLE. NO EXCEPTION.