© H. Heck 2008Section 3.11 Module 3:Analysis Techniques Topic 1: Lattice Diagrams OGI EE564 Howard Heck

Lattice Diagrams EE 564 © H. Heck 2008 Section 3.12 Where Are We? 1.Introduction 2.Transmission Line Basics 3.Analysis Tools 1.Lattice Diagrams 2.Bergeron Diagrams 4.Metrics & Methodology 5.Advanced Transmission Lines 6.Multi-Gb/s Signaling 7.Special Topics

Lattice Diagrams EE 564 © H. Heck 2008 Section 3.13 Contents Lattice Diagram Construction  Axes  Wave vectors  Voltages & Currents Example  Circuit  Lattice Diagram  Waveforms Summary References

Lattice Diagrams EE 564 © H. Heck 2008 Section 3.14 Construction #1 The lattice diagram is a tool for keeping track of the voltage & current waves as they travel back & forth along the transmission line: 0 t d 2t d 3t d 4t d t  0l z   =  =   The time axis runs down the page & is usually expressed in terms of the propagation delay ( t d ) of the transmission line.  The z - (distance) axis runs across the page and extends from the source to the farthest load.  For convenience, the reflection coefficients at each discontinuity are often placed at the top of the diagram.

Lattice Diagrams EE 564 © H. Heck 2008 Section 3.15 To show the propagation of the signal: Construction #2 0 t d tt d tt d tt d tt d 6t d 7t d 8t d tt d 10t d 11t d 12t d t V(z=0)I(z=0)V(z=l)I(z=l)  =  = 0l z V0V0 V1V1 V2V2 V3V3 V5V5 V1V1 V1V1 V 11 V4V4 V6V6 V8V8 V 10 I0I0 I1I1 I2I2 I3I3 I5I5 I7I7 I9I9 I 11 I4I4 I6I6 I8I8 I 10  Do the same for current.  Use the initial wave and the reflection coefficients to calculate the voltage amplitude for each successive reflected wave  Use a “vector” to show the travel of the signal along the line.

Lattice Diagrams EE 564 © H. Heck 2008 Section 3.16 Track the signals at the discontinuities: Construction #3 0 t d 2t d 3t d 4t d 5t d 6t d tt d 8t d 9t d 10t d 11t d 12t d t V(z=0)I(z=0)V(z=l)I(z=l)  =  = 0l z V0V0 V1V1 V2V2 V3V3 V5V5 V1V1 V1V1 V 11 V4V4 V6V6 V8V8 V 10 I0I0 I1I1 I2I2 I3I3 I5I5 I7I7 I9I9 I 11 I4I4 I6I6 I8I8 I 10  Recall from superposition that the total signal ( V or I ) at any point on the network at a given time is the sum of all waves that have reached that point since the last signal transition ( t =0). V 0- I 0- V 0- I 0- V0V0 I0I0 V 0 +V 1 I 0 -I 1 V 0 +V 1 +V 2 I 0 -I 1 +I 2 V 0 +V 1 +V 2 +V 3 I 0 -I 1 +I 2 -I 3 etc. We can now construct the voltage and current waveforms.

Lattice Diagrams EE 564 © H. Heck 2008 Section 3.17 Example Circuit Reflection coefficients: Initial wave: Analyze the low-high transition Final value: Z 0 = 50 ,  D = 3 ns z = 0 z = l I R S = 25  V S = 5.0V R L = 100  Z 0 = 50 

Lattice Diagrams EE 564 © H. Heck 2008 Section 3.18 Example Lattice 0 t d 2t d tt d tt d 5t d 6t d 7t d 8t d tt d 10t d V(z=0)I(z=0)V(z=l)I(z=l)  (z=l) = 1/3  (z=0) = -1/3 0l z t 0.000V0.00mA 0.000V0.00mA 3.333V66.7mA 4.444V44.5mA 3.333V 66.7mA 1.111V 22.2mA V -7.41mA V -2.47mA 0.041V 0.82mA 0.27mA 0.013V V -0.09mA -0.03mA V <0.001V <0.01mA 4.074V37.1mA 3.992V40.4mA 4.000V40.0mA 4.000V40.0mA 3.951V39.6mA 4.005V40.1mA 4.002V40.0mA R S = 25  R T = 100  Z 0 = 50 ,  D = 3 ns V S = 5.0V z = 0 z = l I

Lattice Diagrams EE 564 © H. Heck 2008 Section 3.19 Example Waveforms time [ t d ] voltage [V] V(z=0) V(z=l) time [ t d ] current [mA] I(z=0) I(z=l)

Lattice Diagrams EE 564 © H. Heck 2008 Section Summary Lattice diagrams provide a useful tool for analyzing the voltage and current at points along the interconnect circuit as a function of time.  They track voltage and current wave components, and reflections at discontinuities. The voltage and current waveforms can be easily constructed from the lattice diagrams. Lattice diagrams are of limited use for complex topologies.

Lattice Diagrams EE 564 © H. Heck 2008 Section References S. Hall, G. Hall, and J. McCall, High Speed Digital System Design, John Wiley & Sons, Inc. (Wiley Interscience), 2000, 1 st edition. R. Poon, Computer Circuits Electrical Design, Prentice Hall, 1 st edition, H. Johnson and M. Graham, High Speed Digital Design: A Handbook of Black Magic, PTR Prentice Hall, “Line Driving and System Design,” National Semiconductor Application Note AN-991, April K.M. True, “Data Transmission Lines and Their Characteristics,” National Semiconductor Application Note AN-806, February “Transmission Line Effects in PCB Applications,” Motorola Application Note AN1051, W.R. Blood, MECL System Design Handbook, Motorola, Inc., 4 th edition, 1988.