Preliminary Design of FONT4 Digital ILC Feedback System Hamid Dabiri khah Queen Mary, University of London 30/05/2005.

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Presentation transcript:

Preliminary Design of FONT4 Digital ILC Feedback System Hamid Dabiri khah Queen Mary, University of London 30/05/2005

Digital Feedback System AD-DA processor module Power Amplifier module BPM Kicker Down converter & filters Analog signals Digital signals

AD-DA Processor Module DAC Analog Out ADC Analog In Filtering Recording Analysing FPGA Clocking System RAM & ROM ADC Bus System Digital I/O Power Supply

ADC AD6645 (Analog Devices) 14 bit, 105 Msps, Latency = 3.5 clk cycle

DAC AD9744 (Analog Devices) 14 bit, 210 Msps, Output Settling Time t ST =11ns, Output Propagation delay t PD =1ns, Output Rise Time t R =2.5ns, Input Setup Time t S =2ns, Input Hold Time t H = 1.5ns, Latch Pulse Width t LPW = 1.5 ns

FPGA Xilinx Virtex-4 XC4LX25-11FF6688C

Design tools ISE Foundation (Xilinx) CORE Generator (Xilinx) ChipScope Pro (xilinx) PCB design tools (Mentor graphics) MATLAB & Simulink

Timetable Required TasksEstimated required time (weeks) Time takenComments 1Components20The first prototype is intended to be ready by March 2006 Some tasks should be carried out sequentially and some can be done in parallel with others. 2Circuit Schematic design4 3PCB layout design8 4PCB realisation4 5Components mounting4 6Circuit and PCB testing4 7FPGA application development20 8Simulation and testing the FPGA application 4 9Testing the whole circuit and application together 4