University of Notre Dame Lecture 19 - Intro to MQCA Nanomagnetic Logic Devices

University of Notre Dame Lecture 19 - Intro to MQCA Technology Background Schematic Device Wire Gate Inverter Experimental i1 i3 i2 Inverted output 01 io i o 0 1 R. Cowburn, M. Welland, “Room temperature magnetic quantum cellular automata,” Science 287, 1466, 2000 A. Imre, “Experimental Study of Nanomagnets for Magnetic QCA Logic Applications,” U. of Notre Dame, Ph.D. Dissertation. A. Imre, et. al. “Magnetic Logic Devices Based on Field-Coupled Nanomagnets,” NanoGiga A. Imre, et. al., “Majority logic gate for Magnetic Quantum-Dot Cellular Automata,” Science, vol. 311, No. 5758, pp. 205–208, January, 13, A. Imre, et. al., “Majority logic gate for Magnetic Quantum- Dot Cellular Automata,” Science, vol. 311, No. 5758, pp. 205–208, January, 13, 2006.

University of Notre Dame Lecture 19 - Intro to MQCA Proposed Drive Circuitry Idea: Proposed Implementation: H clock = 0H clock >> H clock  0 Can also change material around magnets to increase permeability

University of Notre Dame Lecture 19 - Intro to MQCA 4 The Task at Hand Show that MQCA can better state-of-the-art in CMOS for systems-level, application-level tasks. Suitable Architectures Technology comparison only meaningful at systems-level (architecture important consideration) Aggregate system energy 1. Hysteresis loss in magnets 2. Cu wire resistance, parasitics 3. Clock generation circuitry Niemier, ISLPED, 2007 More complex circuits Niemier, ICCD, 2008 Electrical/Magnetic Interface Can an MQCA device provide this functionality? Niemier, ICCD, 2008 Scalability How small can devices be reliably made? Fabrication Variation What if we get this instead of this? Niemier, DFTS, 2008

University of Notre Dame Lecture 19 - Intro to MQCA 5 Energy (from the magnets) Until small feature sizes & minimum switching times, energy from magnets dwarfed by clock. G. Csaba et. al., “Power Dissipation in Nanomagnetic Logic Devices,” th IEEE Conference on Nanotechnology, p

University of Notre Dame Lecture 19 - Intro to MQCA 6 Experimental Progress Cu wire cladded on 3 sides w/permalloy Nanomagnets of 4 different sizes have been placed on top Fabrication -108 mT -78 mT -64 mT OOMMF Modeling Maxwell ~ -70 mT ~ 100 mT for J=10 7 A/cm 2

University of Notre Dame Lecture 19 - Intro to MQCA 7 Logic with realistic fabrication constraints What if: New input applied to line in logically correct, AF ordered state? Need correct switching with non-uniform, discontinuous fields New input Logically correct, AF ordered state iii

University of Notre Dame Lecture 19 - Intro to MQCA 8 Integration with CMOS: CMOS Logic Nanomagnet logic MQCA What goes here?? Kung, “Why Systolic Architectures,” IEEE Computer, p , Jan Map well to convolution, DFT, matrix multiply, sorting, pattern matching... Logic for Systolic Architectures Data flows from memory in rhythmic fashion; passes through many PEs before returning to memory Checkpointing Logic Kogge, et. al. DARPA IPTO in the ExaScale Computing Study Motivation: Device resiliency scaling: Hard failures, SEUs, variability. Can recover via checkpoints Copy application state to alternative storage medium to allow application to be stopped, restarted from medium (rollback) MQCA can provide dense, non-volatile shift registers (instead of flash?) x2x2 y1y1 w3w3 w2w2 x1x1 w1w1 y in x in wiwi x ou t y out y out = y in + wx in x out = x in Device is both logic and memory!