Mr. Daniel Perkins Battelle Memorial Institute Mr. Rob Riley Air Force Research Laboratory Gateware Munitions Interface Processor (GMIP)

22004 MAPLD/116Perkins and Riley Outline Background & Objectives GMIP Architecture GMIP CONOPS Test & Demonstration Weapons Integration Toolkit Fusion Summary

32004 MAPLD/116Perkins and Riley Background and Objectives Background Aircraft store integration complexity is a primary cost driver in the deployment of new munitions Reconfigurable computing provides a potential mitigation method for store integration complexity Program Scope/Objectives Investigate use of FPGAs as a reconfigurable architecture to mitigate store integration complexity Provide a demonstration of this capability

42004 MAPLD/116Perkins and Riley GMIP Design Requirements MMSI & 1553 Intefaces Self reconfigurability Up to 8 independent FPGA loads Nonvolatile storage Fast large RAM storage for data intensive operations (DDR DRAM) Fast small RAM storage for simple interfacing (ZBT SRAM) External interfaces for expandability High current power supply for typical applications 3.3V and 5V) Debug interface for development purposes PCI interface for development purposes

52004 MAPLD/116Perkins and Riley GMIP Component Design Details FPGA Selection Virtex II Pro 50 FPGA selected based on evaluation of potential GMIP applications. Virtex II Pro 50 Specs – 23,616 Slices – 232 Multiplier Blocks – KBit SelectRAM Blocks – 8 Digital Clock Managers – 852 IO Pads – 2 PowerPC Hard-Cores

62004 MAPLD/116Perkins and Riley GMIP Component Design Details Memory Selection – 128 MB DDR SDRAM selected based on the need for a large amount of fast, low cost memory storage – 18 Mb ZBT SRAM selected based on the need for a small, fast, low latency and low cost memory storage that provides a simple interface implementation. ZBT SRAM is used specifically by the Condor 1553/MMSI Cores – 16 MB Flash Memory selected based on the expected need to store and recall data between missions and FPGA context switches System ACE MPM Selection – Provides an integrated solution for FPGA configuration/reconfiguration. MPM contains a Flash Memory for target FPGA bitstream storage, an FPGA for configuration/reconfiguration control and a PROM for the FPGA controller boot-up configuration – Stores up to 8 FPGA designs that may be loaded at any time during the mission. – Provides a simple interface for “self reconfiguration”

72004 MAPLD/116Perkins and Riley GMIP Component Design Details Interfaces – MMSI 4 Independent EBR-1553 Interfaces 4 Independent CANBus Interfaces – Independent 1553 Interfaces – RS RS-232 COM Port – 64 Bit PCI Card Edge Interface – 10/100 Ethernet Interface – JTAG Interface for FPGA/System ACE Configuration and debug – Auxiliary IO V Discrete IO 8 RocketIO Serial Channels

82004 MAPLD/116Perkins and Riley GMIP Architecture

92004 MAPLD/116Perkins and Riley GMIP CONOPS Carriage System Electronics 1553 BUS Current: Discrete Component Solution Microcontroller W/ FLASH Mem (448KB) SRAM (26kb) Two CAN Bus Ctrls Two UARTs Two ADCs UTMC or DDC Mil-Std-1553B Remote Terminal MCE EBR-1553B Bus Controller FPGA A B EBR 1553 BUS CAN BUS1 4K x 16 Dual Port SRAM 2MB SRAM CAN BUS2 UART 2MB Flash Mem Proposed: Single FPGA (Virtex- II Pro) Solution ** Block represents a single Virtex-II Pro FPGA chip

MAPLD/116Perkins and Riley GMIP CONOPS Avionics System Integration

MAPLD/116Perkins and Riley GMIP CONOPS Mission-Level Dynamic Reconfiguration Dynamic Reconfiguration Weapon’s Example Captive CarryFlight To Target AreaLoitering In Target Area

MAPLD/116Perkins and Riley Demonstration #1 App X -- MIL-STD-1553B BC/Signal Filter #1

MAPLD/116Perkins and Riley F-16 PDP MIL-STD-1553 Data Bus Configuration Fire Control Computer is the 1553 bus controller, GMIP is emulating this in demo #1

MAPLD/116Perkins and Riley Demonstration #2: EBR-1553 Bus Controller/ Remote Terminal

MAPLD/116Perkins and Riley Demonstration #3: Dynamic Reconfiguration

MAPLD/116Perkins and Riley Summary Reconfigurable Munition Platform Interface Technology Enables Spiral Development – Faster Fielding of Weapon/Platform Capabilities – In-Field Upgrading – Longer System Life Common Weapon/Platform Development and Support Environment – Weapon Platform Integration Tool Kit – CMBRE Next Steps – New version of the board to support VME/cPCI forms factors – Enhanced demonstrations to include SCA-compliant datalinks – Research for integration of High Performance 1553 standard Gateware Munition Interface Processor (GMIP) board (v1)