CSC 110 – Intro to Computing Lecture 9: Computing Components.

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Presentation transcript:

CSC 110 – Intro to Computing Lecture 9: Computing Components

Announcements First set of experience pages due Feb. 23 Quiz solutions will be posted on course web page tomorrow

Central Processing Unit “Brains” of a computer  Performs all of the calculations in the ALU  Control unit directs system to run the various program(s)

Computer Memory Computers contain two types of memory  ROM (Read-Only Memory) Once data written to ROM, it cannot be changed Contains small number of instructions that initialize computer and load operating system  RAM (Random-Access Memory) What people mean when discussing computers “memory” Contents disappear when computer turned off

Stored Program Each byte in RAM has a unique address  Each address is just a number from 0 to ??? Locations in RAM contain a binary number  Number could be part of a program, picture, mp3, Word document…  Each program directs processor how to interpret this information

Finding a Program Contents of RAM disappear when we turn off the power  But I do not want to re-install Word each time I boot computer  Solve this problem by storing programs on secondary storage devices E.g.,

Running a Program Hard drive 10000x slower than RAM  Most of us are not this patient  Other storage devices are even slower! Computer starts program by loading it into RAM  Then uses executes the copy in memory But RAM is still 200x slower than CPU

Processor Cache Small amount of fast memory located on processor CPU stores most recently used instructions in this memory  Programs spend most time re-executing small number of instructions What happens when program executes new instructions?  Do not want CPUs running at 1/200 th speed

Fetch-Execute Cycle Processor run like assembly line Fetch Get instruction from memory and store in cache Decode Determine how processor will execute instruction  Retrieve data used by instruction and store it in registers

Fetch-Execute Cycle Execute Perform the actions  ALU executes math/logic functions  Control unit handles “branch” instructions  Processors use multiple ALUs so they can execute multiple instructions at once Retire Record outcome of instruction  Write results back to memory Work like bucket brigade to do this quickly

Instruction Scheduling add sub add Instruction r 7 f 1 f d 2 f d e 3 f d e r 4 d e r 5 e r 6 Cycles needed w/o pipelining = 4 * 4 = 16 Cycles needed w/ pipelining = 7

Not All Instructions Are Equal Add and subtract: Easy Multiply: Not as easy Divide: Hard Check if any other program modified a specific memory address and, if it has not been modified, write a new value into that address: Priceless  This is also VERY hard

Instruction Scheduling Processors take longer to execute harder instructions Example (actual times depends on CPU):  Add takes 1 cycle  Subtract takes 1 cycle  Multiply takes 3 cycles  Divide takes 5 cycles

Instruction Scheduling add sub mult add Instruction d e r 7 f 1 f d 2 f d e 3 f d e r 4   e 5   e 6 e r 8 r 9 Cycles needed w/o pipelining = 18 Cycles needed w/ pipelining = 9

Why is My Computer So Slow? If we only add & subtract numbers:  Pipelining improves performance 2.125x When we also multiply numbers:  Pipelining improves performance 2x Still an improvement, but not as good!

Mumble… Grumble… Stupid Hardware Problem is we have only one ALU  Can only do one add, sub, mult, div, AND, OR, etc. at a time  So, while our processor is busy multiplying Cannot execute other instructions… … which causes fetch & decode units to back up… … and causes our assembly line to stop Obvious solution: add another ALU

Woo-Hoo, More Hardware! add sub mult add Instruction e  r 7 f 1 f d 2 f d e 3 f d e r 4 d e e 5   e 6  r 8 r 9 Cycles needed w/o pipelining = 18 Cycles needed w/ pipelining = 9

What Happened Adding an ALU had no impact! Must finish first instruction before retiring the next one What if we allow CPU to execute and retire instructions in any order?  Imagine if we began with the multiply instruction

One More Time add sub mult add Instruction  r 7 f 1 f d 2 f d e 3 f d e r 4 d e e 5 e r e 6 r 8 9 Cycles needed w/o pipelining = 18 Cycles needed w/ pipelining = 8

Success! Running instructions out-of-order reduces execution time by 6% Modern processors actually execute MANY instructions at once Even fancier things happen in a compiler (program which creates other programs)  Compiler research also makes people smarter and more attractive

Your Turn What impact does 1 or 2 ALUs have on these instructions?  How about executing in-order or out-of-order? add mult sub add div sub add mult sub add mult add sub div add div add div mult sub

Boolean Properties Law of Double Negation: PropertyANDOR Commutative a·b = b·aa+b = b+a Associative a·(b·c) = (a·b)·ca+(b+c)=(a+b)+c Distributive a·(b+c) = (a·b)+(a·c)a+(b·c) = (a+b)·(a+c) Identity a·1 = aa+0 = a Complement a·ā = 0a+ā = 1 DeMorgan a·b = ā+ba+b = ā·b Idempotency a·a = aa+a = a

For next lecture Relax and enjoy the (relative) break  No quiz and no homework! Start reading Section 12 Be ready to discuss:  Information systems and databases