by Computer System Design Lecture 1 Wannarat Suntiamorntut

by Overview Computer Organization & Design Both in Hardware/Software Interface Learning by Evolution Based on RISC processor (MIPS)

by Course Structure Lectures * 1-wk, Introduction Technology * 3-wk, The role of Performance and ISA * 2-wk, Arithmetic for computer * 5-wk, Processor Design * 2-wk, Pipeline * 2-wk, Memory * 2-wk, Interfacing and peripheral

by Course Administration Instructor : Wannarat Suntiamorntut Office hours : Mon. - Fri. 09: :30 Material : Text : Computer Organization & Design : Hardware/Software Interface. 2 nd Edition : Petterson and Hennessy

by Grading Assignment 30 % Simple processor Design based on MIPs Midterm 30 % Final30 % Class attendant 10%

by Course Problem You are late assignment. You Do not understand and Do not find out the answers. Realize that you are a STUDENT, find out the information and knowledge. Plan and management your time carefully.

by Acknowledgemen t Petterson and Hennessy, Computer Organization and Design : Hardware/Software Interface. Slide Material from Morgan Kaufmann Publisher. Prof. Bob Broderson, Berkeley U. Prof. V. Heuring, and H. Jordan Prof. Arvind, & Krste Asanovic, MIT

by Level of Representation

by Hardware / Software Software Hardware Instruction Set

by Example ISA Digital Alpha(V1,V3) HP PA-RISC(V1.1,V2.0) Sun Sparc(V8, V9) SGI MIPS(MIPS I,II,III IV,V) Intel(8086,286, ,486, Pentium…)

by MIP R 4000 ISA * Load/Store * Computation * Jump/Branch * Floating point * Memory management * Special R0 - R31 PC HI LO All 32-bit wide

by MIP R4400 Organization Source : MIP R4000 Microprocessor User’s manual, 2nd edition.

by Computer Architecture ISA | I/O system Datapath & Control Digital Design Circuit Design Layout Application OS Compiler Firmware Instruction Set Architecture

by Computer Architecture Computer Architecture Technology Programming Language Application OS Constraints e.g. cost, energy

by Technology Changing Processor - Capacity about 30% per year - Clock rate about 20% per year Memory - DRAM capacity about 60% per year - Speed about 10% per year - Cost per bit about 25% per year Disk - Capacity about 60% per year

by Technology

by DRAM Technology YearSize Kb Kb Mb Mb Mb Mb Mb Gb

by Processor Performance

by DSP Processor Improvement

by Course Content Computer Architecture and Engineering - Instruction Set Design- Computer Org. - Interface- HW component - Compiler/System View- logic designer’s view - Building Architect - Construction engineer

by Summary Knowledge Computer consist of five components - Processor : [1]-Datapath, [2]-Control - [3]-Memory - [4]-Input devices, [5]-Output devices Memory Cache : Fast, Expensive Main Memory : less expensive

by Summary Interface: problem between Computer and Outside world. Design : Performance, Power, Area and Cost

by Break 5 Minutes Questions & Answers

by Next to Lecture 2 : Role of Performance & Instruction Set Architecture (ISA)