Work in Progress --- Not for Publication 1 ERD WG 1/15/09 ERD TWG Emerging Research Devices Telecon Meeting No. 3 Jim Hutchby - Facilitating Thursday,

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Presentation transcript:

Work in Progress --- Not for Publication 1 ERD WG 1/15/09 ERD TWG Emerging Research Devices Telecon Meeting No. 3 Jim Hutchby - Facilitating Thursday, January 15, :00 am – 10:30 Eastern US Time ERD WG Telecon January 15, 2009 Pacific US Central US Eastern US Europe Taiwan Japan/Korea 6am 8am 9am 3pm 10pm 11pm

Work in Progress --- Not for Publication 2 ERD WG 1/15/09 Jan. 15, 2009 ERD Telecon Meeting Objectives u Review structure and content of 2007 ERD Logic Section tables u Review and discuss Japan ERD proposal for a new structure for the 2009 ERD Logic Section tables.

Work in Progress --- Not for Publication 3 ERD WG 1/15/09 January 15, 2009 ERD Telecon Meeting Agenda 9:00 am Check in & review meeting Hutchby Objectives/Agenda 9:10 Review 2007 ITRS/ERD Logic Table Bourianoff structure 9:30 Present the Japan ERD Proposal for Hiramoto-san the 2009 ERD Logic Table structure 9:50 Discuss 2009 ERD Logic Table Bourianoff structure Hiramoto-san 10:30 Adjourn Meeting

Work in Progress --- Not for Publication 4 ERD WG 1/15/09 Device FET Extension FET [A]1D structuresChannel replacement SETMolecularFerromagnetic logic Spin transistor Typical example devicesSi CMOSCNT FET NW FET NW hetero- structures Nanoribbon transistors with graphene III-V compound semiconductor and Ge channel replacement SETCrossbar latch Molecular transistor Molecular QCA Moving domain wall M: QCA Spin Gain transistor Spin FET Spin Torque Transistor Cell Size (spatial pitch) [B] Projected100 nm100 nm [D]300 nm [I]40 nm [O]10 nm [U]140 nm [Y]100 nm [C] Demonstrate d 590 nm ~1.5  m [E] 1700 nm [J]~200 nm [K, L] ~2  m [V] 250 nm [Z, AA] 100  m [AB] Density (device/cm 2 ) Projected1E104.5E96.1E96E101E125E94.5E9 Demonstrate d 2.8E84E73.5E7~2E92E71.6E91E4 Switch Speed Projected12 THz6.3 THz [F]>1 THz10 THz [Q]1 THz [W]1 GHz [Y]40 GHz [AC] Demonstrate d 1.5 THz200 MHz [G]>300 GHz2 THz [R]100 Hz [V]30 Hz [Z, AA]Not known Circuit Speed Projected61 GHz61 GHz [C] 1 GHz [O]1 GHz [U]10 MHz [Y]Not known Demonstrate d 5.6 GHz220 Hz [H] Data not available 1 MHz [P]100 Hz [V]30 Hz [Z]Not known Switching Energy, J Projected3E E-18 1×10 –18 [O] [>1.5×10 –17 ] [S] 5E-17 [X]~1E-17 [Z]3E-18 Demonstrate d 1E-161E-11 [H]1E-16 [J] 8×10 –17 [T] [>1.3×10 –14 ] [S] 3E-7 [V]6E-18 [AA]Not known Binary Throughput, GBit/ns/cm 2 Projected E-2Not known Demonstrate d 1.61E-8 Data not available 2E-42E-95E-8Not known Operational TemperatureRT RT [M, N] RT Materials SystemSi CNT, Si, Ge, III-V, In 2 O 3, ZnO, TiO 2, SiC, InGaAs, InAs, InSb III-V, Si, Ge, Organic molecules Ferromagnetic alloys Si, III-V, complex metals oxides Research Activity [AD] Table ERD7a Emerging Research Logic Devices—Demonstrated and Projected Parameters

Work in Progress --- Not for Publication 5 ERD WG 1/15/09 Resonant Tunneling Diodes Multi-ferroic Tunnel Junctions Single Electron Transistors Molecular Devices Ferro- Magnetic Devices Frequency Coherent Spin Devices State VariableCharge Dielectric and magnetic domain polarization Charge Molecular conformation Ferromagnetic polarization Precession frequency Response Function Negative differential resistance Four resistive states Staircase I/V from Coulomb blockade HystereticNonlinear Class— Example Multi-ferroic tunnel junction Voltage tunable transfer function CMOL, cross bar latch Amplifiers, buses, switches Spin torque oscillator ArchitectureHeterogeneousMorphic Heterogeneous, morphic MQCA, morphic Morphic Application Elements in hybrid magneto electric circuits Analog pattern matching Associative processing, NP complete, Elements in hybrid magneto- electric circuits Microwave power, tunable rectifiers Comments Additional functionality Density, functionality Density, cost functionality Radiation hard, environmental rugged RF functionality StatusDemo Simulation Material IssuesStray chargeRT DMS Table ERD7b Alternative Information Processing Devices

Work in Progress --- Not for Publication 6 ERD WG 1/15/09 Logic Table 2007 Version Table (1) Emerging Logic (General Purpose) (2) Alternative Info. Processing Devices Transition Table 2009 Version (Proposed) Table (1) CMOS Extension (2) Beyond CMOS (CMOS Supplement) Transition Table (3) Pure Beyond CMOS (CMOS replacement) Classified by Operation Principles Classified by Principles and Materials T. Hiramoto, Dec. 14, 2009.

Work in Progress --- Not for Publication 7 ERD WG 1/15/09 year Beyond CMOS Elements ERD-WG in Japan Existing technologies New technologies Evolution of Extended CMOS CMOS Extension CMOS Supplement CMOS Replacement

Work in Progress --- Not for Publication 8 ERD WG 1/15/09 (1) CMOS Extension Table

Work in Progress --- Not for Publication 9 ERD WG 1/15/09 (2) Beyond CMOS (CMOS Supplement) - Spin MOSFET (Including STT) - SET (including Molecular SET) - CMOL

Work in Progress --- Not for Publication 10 ERD WG 1/15/09 (3) Beyond CMOS (CMOS Replacement) - Spin Wave - Domain Wall - NEMS - Electrochemical (Atom Switch, Memoristor?) - Molecular Computing Devices - Spin Transistor

Work in Progress --- Not for Publication 11 ERD WG 1/15/09 Operation Principles and Materials