1 CSE370, Lecture 18 Lecture 20 u Logistics n HW6 due Wednesday n Lab 7 this week (Tuesday exception) n Midterm 2 Friday (covers material up to simple.

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1 CSE370, Lecture 18 Lecture 20 u Logistics n HW6 due Wednesday n Lab 7 this week (Tuesday exception) n Midterm 2 Friday (covers material up to simple FSM (today)) n Review on Thursday n Yoky office hour on Friday moved to Thursday 12-1:20pm online u Last lecture n Counter design n Finite state machine – started vending machine example u Today n Continue on the vending machine example n Moore/Mealy machines 20

2 CSE370, Lecture 18 The “WHY” slide u Finite State Machine (FSM) n This is what we have been waiting for in this class. Using combinational and sequential logics, now you can design a lot of clever digital logic circuits for functional products. We will learn different steps you take to go from word problems to logic circuits. u Moore/Mealy machines n There are two different ways to express the FSMs with respect to the output. Both have different advantages so it is good to know them. 20

3 CSE370, Lecture 18 FSM design n Counter-design procedure 1. State diagram 2. State-transition table 3. Next-state logic minimization 4. Implement the design n FSM-design procedure 1.State diagram 2.state-transition table 3. State minimization 4. State encoding 5. Next-state logic minimization 6. Implement the design 20

4 CSE370, Lecture 18 Example: A vending machine u 15 cents for a cup of coffee u Doesn’t take pennies or quarters u Doesn’t provide any change n FSM-design procedure 1.State diagram 2.state-transition table 3. State minimization 4. State encoding 5. Next-state logic minimization 6. Implement the design 20 Vending Machine FSM N D Reset Clock Open Coin Sensor Release Mechanism

5 CSE370, Lecture 18 A vending machine: (conceptual) state diagram 20 S0 Reset S2 D S6 [open] D S4 [open] D S1 N S3 N S5 [open] N S8 [open] D S7 [open] N (from all states) Draw self-loops for N’ D’ for S0 to S3 Also draw self-loops for 1 for S4 to S8

6 CSE370, Lecture 18 A vending machine: State transition table 20 presentinputsnextoutput stateDNstateopen S S200 S20 01 S50 10 S60 11 XX S300 S30 01 S70 10 S80 11 XX S4XX S41 S5XX S51 S6XX S61 S7XX S71 S8XX S81 S0 0 S1 0 S2 0 X X S100 S10 01 S30 10 S40 11 XX

7 CSE370, Lecture 18 A vending machine: State minimization 20 symbolic state table presentinputsnextoutput stateDNstateopen 0¢00 0¢0 01 5¢0 1010¢0 11–– 5¢00 5¢0 0110¢0 1015¢0 11–– 10¢0010¢ 0115¢0 1015¢0 11–– 15¢––15¢1 0¢ Reset 5¢ N N N + D 10¢ D 15¢ [open] D N’D’ Reset

8 CSE370, Lecture 18 A vending machine: State encoding 20 present stateinputsnext stateoutput Q1Q0DND1D0open ––– ––– ––– 11–– 111

9 CSE370, Lecture 18 A vending machine: Logic minimization 20 D1 = Q1 + D + Q0 N D0 = Q0’ N + Q0 N’ + Q1 N + Q1 D OPEN = Q1 Q X X 1 1 Q1 D1 Q0 N D X X 1 X Q1 Open Q0 N D X X Q1 D0 Q0 N D

10 CSE370, Lecture 18 A vending machine: Implementation 20

11 CSE370, Lecture 18 Inputs Outputs Next State Current State output logic Next-state logic Generalized FSM model: Moore and Mealy u Combinational logic computes next state and outputs n Next state is a function of current state and inputs n Outputs are functions of íCurrent state (Moore machine) íCurrent state and inputs (Mealy machine) 20

12 CSE370, Lecture 18 Moore versus Mealy machines outputs state feedback inputs reg combinational logic for next state logic for outputs Moore machine Outputs are a function of current state Outputs change synchronously with state changes Mealy machine Outputs depend on state and on inputs Input changes can cause immediate output changes (asynchronous) inputsoutputs state feedback reg combinational logic for next state logic for outputs 20

13 CSE370, Lecture 18 DQ Q DQ Q A B clock out Example 10 -> 01: Moore or Mealy? u Circuits recognize AB=10 followed by AB=01 n What kinds of machines are they? Moore Mealy 20

14 CSE370, Lecture 18 Example 01/10 detector: a Moore machine u Output is a function of state only n Specify output in the state bubble D/1 E/1 B/0 A/0 C/ reset currentnextcurrent resetinputstatestateoutput 1––A000AB001AC000BB001BD000CE001CC000DE101DC100EB101ED11––A000AB001AC000BB001BD000CE001CC000DE101DC100EB101ED1 20

15 CSE370, Lecture 18 Example 01/10 detector: a Mealy machine u Output is a function of state and inputs n Specify outputs on transition arcs currentnextcurrent resetinputstatestateoutput B A C 0/1 0/0 1/1 1/0 reset/0 1––A000AB001AC000BB001BC100CB101CC01––A000AB001AC000BB001BC100CB101CC0 20

16 CSE370, Lecture 18 Comparing Moore and Mealy machines u Moore machines + Safer to use because outputs change at clock edge – May take additional logic to decode state into outputs u Mealy machines + Typically have fewer states + React faster to inputs — don't wait for clock – Asynchronous outputs can be dangerous u We often design synchronous Mealy machines n Design a Mealy machine n Then register the outputs 20

17 CSE370, Lecture 18 Synchronous (registered) Mealy machine u Registered state and registered outputs n No glitches on outputs n No race conditions between communicating machines inputsoutputs state feedback reg combinational logic for next state logic for outputs reg 20

18 CSE370, Lecture 18 Example 0 -> 1: Moore or Mealy? u Recognize A,B = 0,1 n Mealy or Moore? Registered Mealy (actually Moore) Moore 20