Ch. 6 Pointers and Data Structures From the text by Valvano: Introduction to Embedded Systems: Interfacing to the Freescale 9S12.

Slides:



Advertisements
Similar presentations
Pointers.
Advertisements

Ch. 7 Local Variables and Parameter Passing From the text by Valvano: Introduction to Embedded Systems: Interfacing to the Freescale 9S12.
Ch.3 Representation and Manipulation of Information From Introduction to Embedded Systems: Interfacing to the Freescale 9s12 by Valvano, published by CENGAGE.
INSTRUCTION SET ARCHITECTURES
CSI 3120, Implementing subprograms, page 1 Implementing subprograms The environment in block-structured languages The structure of the activation stack.
There are two types of addressing schemes:
TOPIC : Finite State Machine(FSM) and Flow Tables UNIT 1 : Modeling Module 1.4 : Modeling Sequential circuits.
ECE 353 Introduction to Microprocessor Systems Michael G. Morrow, P.E. Week 6.
Computer Organization. This module surveys the physical resources of a computer system. –Basic components CPUMemoryBus I/O devices –CPU structure Registers.
1 Storage Registers vs. memory Access to registers is much faster than access to memory Goal: store as much data as possible in registers Limitations/considerations:
1 Chapter 7: Runtime Environments. int * larger (int a, int b) { if (a > b) return &a; //wrong else return &b; //wrong } int * larger (int *a, int *b)
Run time vs. Compile time
An introduction to systems programming
Chapter 3 Program translation1 Chapt. 3 Language Translation Syntax and Semantics Translation phases Formal translation models.
State Machines Timing Computer Bus Computer Performance Instruction Set Architectures RISC / CISC Machines.
Operating Systems File systems
Structured Data Types and Encapsulation Mechanisms to create new data types: –Structured data Homogeneous: arrays, lists, sets, Non-homogeneous: records.
CIS 260 Computer Programming I in C Prof. Timothy Arndt.
Lecture 18 Last Lecture Today’s Topic Instruction formats
1 Input/Output. 2 Principles of I/O Hardware Some typical device, network, and data base rates.
Lab 1 – Assembly Language and Interfacing Start date: Week 3 Due date: Week 4 1.
Chapter 7: Runtime Environment –Run time memory organization. We need to use memory to store: –code –static data (global variables) –dynamic data objects.
Runtime Environments What is in the memory? Runtime Environment2 Outline Memory organization during program execution Static runtime environments.
Dr. José M. Reyes Álamo 1.  The 80x86 memory addressing modes provide flexible access to memory, allowing you to easily access ◦ Variables ◦ Arrays ◦
Introduction to Data Structures. Definition Data structure is representation of the logical relationship existing between individual elements of data.
Dr. Rabie A. Ramadan Al-Azhar University Lecture 6
MIPS coding. SPIM Some links can be found such as:
Machine Instruction Characteristics
Objectives Implement pointers using indexed addressing modes Use pointers to access arrays, strings, structures, tables, and matrices Present finite-state.
4-1 Chapter 4 - The Instruction Set Architecture Principles of Computer Architecture by M. Murdocca and V. Heuring © 1999 M. Murdocca and V. Heuring Principles.
Execution of an instruction
6-1 EE 319K Introduction to Microcontrollers Lecture 6: Indexed Addressing Mode and Variants, Functional Debugging, Arrays, Strings.
EE 319K Introduction to Microcontrollers
V 1.01 Arrays and Pointers in C A pointer variable is a variable that contains the address of another variable. An array is a collection of like elements,
3-1 EE 319K Introduction to Microcontrollers Lecture 3: Addressing modes, Memory Operations, Subroutines, I/O, Logical/Shift Operations.
1 Segments and Pseudo Operations Program Development.
1 ECE 372 – Microcontroller Design Assembly Programming HCS12 Assembly Programming Addressing Modes Stack Operations Subroutines.
8-1 EE 319K Introduction to Microcontrollers Lecture 8:Fixed Point Numbers, Local Variables, Binding, Allocation, Access, Deallocation.
Ch.2 Intro. To Assembly Language Programming
CSC 8505 Compiler Construction Runtime Environments.
ECE 353 Introduction to Microprocessor Systems Michael G. Morrow, P.E. Week 7.
Ch.2 Intro. To Assembly Language Programming From Introduction to Embedded Systems: Interfacing to the Freescale 9s12 by Valvano, published by CENGAGE.
Arrays in MIPS Assembly Computer Organization and Assembly Language: Module 6.
Onlinedeeneislam.blogspot.com1 Design and Analysis of Algorithms Slide # 1 Download From
1 Basic Processor Architecture. 2 Building Blocks of Processor Systems CPU.
Embedded Systems Lecture 5 January 25 th, 2016.
LECTURE 3 Translation. PROCESS MEMORY There are four general areas of memory in a process. The text area contains the instructions for the application.
Hello world !!! ASCII representation of hello.c.
Operating Systems A Biswas, Dept. of Information Technology.
7-Nov Fall 2001: copyright ©T. Pearce, D. Hutchinson, L. Marshall Oct lecture23-24-hll-interrupts 1 High Level Language vs. Assembly.
F453 Module 8: Low Level Languages 8.1: Use of Computer Architecture.
Lecture 3 Translation.
“<Fill in your definition here.>”
Addressing Modes in Microprocessors
Data Structure Interview Question and Answers
System Programming and administration
Memory Units Memories store data in units from one to eight bits. The most common unit is the byte, which by definition is 8 bits. Computer memories are.
Computer Organization and Assembly Language (COAL)
ME 4447/6405 Microprocessor Control of Manufacturing Systems and
ME4447/6405 Microprocessor Control of Manufacturing Systems and
Practice Six Chapter Eight.
The Von Neumann Model Basic components Instruction processing
MIPS Instructions.
EE 319K Introduction to Embedded Systems
Introduction to Microprocessor Programming
Process.
An introduction to systems programming
Information Representation: Machine Instructions
COMP755 Advanced Operating Systems
COS 151 Bootcamp – Week 4 Department of Computer Science
Presentation transcript:

Ch. 6 Pointers and Data Structures From the text by Valvano: Introduction to Embedded Systems: Interfacing to the Freescale 9S12

Objectives Implement pointers using indexed addressing modes Use pointers to access arrays, strings, structures, tables, and matrices Present finite-state machines as an abstractive design methodology Describe how the paged memory system allows memory sizes above 64KiB Present minimally intrusive methods for functional debugging

6.1 Indexed Addressing Modes Used to Implement Pointers 9S12 has 15 addressing modes. 9 are related to pointers. Assembly—pointers are implemented using indexed addressing. The address is placed into RegisterX or RegisterY, then the data is accessed using indexed addressing mode.

Figure 6.2, page 193 Pointers—PT, SP, GetPt, PutPt Arrows show the memory location to which they point. Shaded regions represent data. Array or string —simple structure with multiple, equal-sized elements—the pointer points to the first element then the indexed addressing mode is used to access the rest of the structure.

Figure 6.2 (cont.) The Stack —SP points to the top element of the stack. Linked List – contains some data elements that are pointers. FIFO Queue – important for I/O programming.

6.1.1 Indexed Addressing Mode Uses a fixed offset with the 16-bit registers (X, Y, SP, and PC). The offsets that are possible include: –5-bits (-16 to +15) –9-bits (-256 to + 127) –16- bits Example of 5 bit indexing: (5C is index mode operand—1 byte) –$6A5C staa -4,Y ; [Y-4] = Reg A –Assume RegA is $56, RegY is $0823 –$ = $081F –See Figure 6.3

More Examples of Indexed Addressing Mode Example of 9-bit indexed mode requires 2 bytes to encode the operand: –$6AE840staa $40,Y ; [Y+$40] = Reg A –See Figure 6.4 (note: $40 + $8023 = $8063) Example of 16-bit indexed mode requires 3 bytes to encode the operand: –$6AEA2000 staa $200,Y ; [Y + $200] =RegA –See Figure 6.5 (note: $200 + $0823=$0A23)

6.1.2 Auto Pre/Post Decrement/Increment Indexed Addressing Mode The 16-bit pointers are used (X, Y, SP). These pointers are modified either before (PRE) or after (POST) the access of the memory. Used for accessing memory sequentially. Example: Post-increment addressing. –Staa 1,Y+ ; Store a copy of value in Reg A at 2345, then Reg Y = –More examples on the bottom of page 195.

Other Addressing Modes Accumulator-Offset Indexed Addressing mode—Accumulator A,B, or D are used with registers X, Y, SP, and PC. –Example: staa B,Y –Efficient for accessing arrays Indexed-Indirect Addressing Mode –A fixed offset of 16 bits is used (X, Y, SP or PC). –A second address is fetched; the load or store is operated on the second address. –Useful when data structures include pointers (pg. 196).

And More Addressing Modes Accumulator D Offset Indexed-Indirect Addressing Mode. –Also useful when data structures includes pointers. –Offset is in D and is added to X, Y, SP, or PC Post-Byte machine Coded for Indexed Addressing Load Effective Address Instructions Call-By-Reference Parameter Passing

6.2 Arrays Random Access –Read and write data in any order. –Allowed for all indexed data structures. –An indexed data structure has elements of the same size—it is accessed knowing the name of the structure, the size of the elements and the number of elements.

6.2 (cont.) Sequential access –The elements are read and written in order. –Examples: strings, linked lists, stacks, queues, and trees. Arrays –Made of elements of equal precision and allows random access. –Length is the number of elements. –Origin is the index of the first element.

Example 6.1 Write a stepper module to control the read/write head of an audio tape recorder. –Three public functions Initialization Rotate one step clockwise Rotate one step counterclockwise –Stepper motor has four digital control lines To make it spin, output 5, 6, 10, and 9 over and over. To make it spin in the opposite direction, output the values in reverse order. Figure 6.9 illustrates the byte array. Program 6.1 shows the code (fcb means form constant byte)

Example 6.2 Design an exponential function y=10 x, with a 16-bit output. –X is an input from 0 to 4. –Figure 6.10 illustrates a word array –Program 6.2 (page 201) illustrates the use of the array (fdb means form double byte and is used to define word constants.)

Termination Codes Termination codes can be used to handle variable length. Table 6.3 illustrates typical termination codes. Program 6.3 illustrates the use of the null termination code. Program 6.4 illustrates a pointer method to access the array.

6.3 Strings A data structure with equal-sized elements that are only accessed sequentially. The length of the string is stored in the first position, when data can take on any value; thus termination codes are not needed.

Example 6.3 Example 6.3 (page 203) – Write software to output a sequence of values to a digital to analog converter. –The length is stored in the first byte: Data1fcb4;length fcb 0,50,100,50 ;data Data2fcb8 fcb 0,25,50,75,100,75,50,25

Example 6.3 (cont.) The DAC is connected to Port T. The function (subroutine) DAC outputs the string data to the digital to analog converter. –DACldab 0,x;length –loopinx;next element – ldaa 0,x ;data – staa PTT ;out to the dig/analog conv – decb – bne loop – rts

Example 6.3 (cont.) main lds #$4000 movb #$FF, DDRT mloop ldx #Data1 ;first string bsr DAC ldx #Data2 ;second string bra mloop

Example 6.4 Write software to output a ASCII string to the serial port. Call by reference parameter passing is used—a pointer to the string will be passed. See Program 6.6, page 204.

6.4 Matrices Two dimensional data structure accessed by rows and columns. Figure 6.11 illustrates “row major” and “column major”. Program 6.8 illustrates a function to access a two by three column-major matrix. (page 205)

Example 6.5 Develop a set of driver functions to manipulate a 32 by 12 graphics display. Bit arrays are used to store pixel values. 0 represents a blank, 1 turns on a pixel. Program 6.11, 6.12 and 6.13 illustrate the access, modification, and reading of the bit matrix.

Structures A structure has elements with different types and/or precisions. Program 6.14 is an assembly language example of a structure.

Tables A table is a collection of identically sized structures. Fig shows a table made up of a simple data base. Program 6.16 (page 211)

Trees A graph is a general linked structure without limitations.

6.8 Finite-State Machines with Statically Allocated Linked Structures Abstraction –Allows the definition of complex problems using basic abstract building blocks. –Finite-State-Machine is a basic abstraction.

Finite State Machines Execution of a Moore FSM –1. Perform output, which depends on the current state. –2. Wait a prescribed amount of time (optional) –3. Input –4. Go to next state, which depends on the input and the current state.

Finite State Machines (cont.) Mealy FSM –1. Wait a prescribed amount of time (optional) –2. Input –3. Perform output, which depends on the input and the current state –4. Go to next state, which depends on the input and the current state

Finite State Machines (cont.) Sequence should be documented before state graph is drawn. States are drawn as circles Arrows are drawn from one state to another (with the input causing the transition).

Linked-Structure of Nodes Each node defines one state. One or more of the entries in the node is a pointer (or link). Embedded systems usually have statically allocated fixed-size linked structures. In simple embedded systems, the state graph is fixed and stored in nonvolatile memory.

6.8.2 Moore FSMs Outputs are only a function of current state. –Example 6.6 Traffic Light Problem

6.8.3 Mealy Finite-State Machines Outputs depend on both the input and the current state. Arrows specify both output and next state. Used when the output is needed to cause the state to change. Example 6.7 Four-Legged Trotting Robot.

6.8.4 Functional Abstraction Within FSMs Input is obtained by calling a function. Output process involves calling a function. Function calls adds a layer of abstraction between the FSM and the I/O at the ports. Example 6.8—Vending Machine Example 6.9—Robot that Sits, stands, and lies down.

6.9 Dynamically Allocated Structures Dynamic Memory Allocation is used to reuse memory and provide for efficient use of RAM. Fixed allocation used in previous examples (size of data structures is specified in the assembly code). With dynamic allocation, the size and location of the data structures is determined at run time (not assembly time).

Heap—a chunk of RAM that is –1. Dynamically allocated by the program –2. Used by the program to store information –3. Dynamically released by the program when the structure is no longer needed. Implementation of dynamic allocation requires the management of a heap.

6.9.1 Fixed-Block Memory Manager Figure 6.27 –Initial state of the heap has all of the free blocks linked in a list. Program 6.28 –Shows the global structures for the heap, defined in RAM. –SIZE—number of 8-bit bytes in each block. –NUM—number of blocks to be managed. –FreePt--points to the first free block. Program 6.29 –Software that that partitions the heap into blocks and links them together.