EL 402Spring Ilker Hamzaoglu1 EL402 VLSI System Design II Spring 2009 Instructor: Ilker Hamzaoglu MDBF 1037 Teaching Assistant: Onur Can Ulusel MDBF 1042 Web Site:

EL 402Spring Ilker Hamzaoglu2 Course Structure EL VLSI Systems Design II M 11:40 am - 12:30 pm FENS L058 R 11:40 am - 1:30 pm FENS L058 EL 402R 0.00 VLSI Systems Design II Rec. M 12:40 pm - 1:30 pm FENS L058

EL 402Spring Ilker Hamzaoglu3 Course Description This course introduces System-on-a-chip (SoC) ASICs and it describes various embedded cores used in SoC ASICs. It then discusses the design and verification of SoC ASICs. In this course, students will also gain practical design experience by using Arm7 simulation model, Modelsim (Mentor Graphics) and Design Compiler (Synopsys) CAD tools to implement and verify a prototype SoC ASIC. The SoC ASIC will be implemented using Verilog HDL and standard cell based design methodology.

EL 402Spring Ilker Hamzaoglu4 References Lecture Slides Arm Inc. ( Technical Documents (Technical Specifications, Technical Reference Manuals, White Papers, and Company Presentations) Textbooks: –ARM System-on-chip Architecture, Steve Furber, Addison Wesley, 2nd Edition, 2000 –Computers as Components: Principles of Embedded Computing System Design, Wayne Wolf, Morgan Kaufmann, 2nd Edition, 2005 –Reuse Methodology Manual for System-on-a-Chip Designs, Michael Keating, Pierre Bricaud, Russell John Rickford, Kluwer Academic Publishers, 3rd Edition, July 2002

EL 402Spring Ilker Hamzaoglu5 Tentative Schedule Introduction –System-on-a-chip (SoC) ASICs –Core-based and Platform-based Design SoC Embedded Cores –Embedded Microprocessors, Arm Cores –Hardware Accelerators –On-chip Interconnects, Arm AMBA –Memory Controllers, DMA, Interrupt Controller –Device Interfaces, Image Sensor Interface SoC ASIC Design –System Level (Architecture) Design –Behavioral (Architectural) Modeling, SystemC –Behavioral (Architectural) Synthesis SoC ASIC Verification SoC ASIC Debugging

EL 402Spring Ilker Hamzaoglu6 SoC ASIC Design Project SRAM Controller Arm7 Cache Clock Dividers PLL (Model) Register Files Image Processing Accelerator AHB Bus Arm7TDMI (Model) AHB Bus Decoder AHB Bus Mux SRAM (Model) Crystal Oscillator (Model) TestBench Image Sensor (Model) Image Sensor Interface

EL 402Spring Ilker Hamzaoglu7 Grading Attendance 10% SoC ASIC Design Project 40% Paper Presentation 10% Final Exam 40% Students will work in groups of two for the project. The project will be done using the Sun Workstations in the VLSI Design Lab which is located in MDBF Cheating in the project and the exam is not allowed. It will be strongly penalized.