Altera’s Excalibur Development System Tyson Hall School of Electrical and Computer Engineering Georgia Institute of Technology
Terms Altera: The Company Excalibur: The 114 Quartus II: The Software Nios: The Processor APEX: The main CPLD
Hardware Design Flow Quartus II Run MegaWizard Plug-In Manager Select SOPC Builder SOPC Builder Design Nios processor Quartus II Make pin assignments Write supporting VHDL modules Compile, simulate and download design
Software Design Flow Programming Editor Write C code to run on Nios processor (or, write ASM code to run on Nios processor) Cygwin / BASH / Nios SDK Shell Compile C code Download C code to board via 9-pin serial cable Use terminal to interact with the Nios processor
32-bit Reference Design
Starting the Wizard 1 2 3
Altera SOPC Builder – Reference Design
Altera SOPC Builder
Directory Structure $SOPC = $ALTERA\Excalibur\sopc_builder_2_5 Nios Documentation $SOPC\documents Nios Examples $SOPC\examples\vhdl\
Directory Structure The Wizard Creates... $PROJECT\cpu_sdk\inc $PROJECT\cpu_sdk\lib $PROJECT\cpu_sdk\src
Options, Options, Options... CPU SRAM-based CPLD (Temporary) EEPROM-based CPLD (Persists) Software / Code RAM Flash Flash, but run from RAM
CPU Use SRAM-based CPLD (Temporary) Pressing Clear restarts the code/CPU Pressing Reset is a “hard” reset
Software / Code RAM nios-build [filename].c nios-run [filename].srec Flash See Nios 2.0 Tutorial Flash, but run from RAM See Nios 2.0 Tutorial Use srec2flash
Help!!! Go to Support Solutions Database For the srec2flash white paper, go to the Solutions Database and search for “srec2flash”.