UNIT I MOS TRANSISTOR THEORY AND PROCESS TECHNOLOGY

Slides:



Advertisements
Similar presentations
Lecture Metal-Oxide-Semiconductor (MOS) Field-Effect Transistors (FET) MOSFET Introduction 1.
Advertisements

MICROWAVE FET Microwave FET : operates in the microwave frequencies
ECA1212 Introduction to Electrical & Electronics Engineering Chapter 6: Field Effect Transistor by Muhazam Mustapha, October 2011.
MODULE SYSTEM LOGIC GATE CIRCUIT DQ CMOS Inverter ASIC Full-Custom Semi-Custom Programmable FPGA PLD Cell-Based Gate Arrays General Purpose DRAM & SRAM.
Metal-Oxide-Semiconductor Fields Effect Transistors (MOSFETs) From Prof. J. Hopwood.
(Neil weste p: ).  A MOS transistor is a majority-carrier device, in which the current in a conducting channel between the source and the drain.
Chapter 6 The Field Effect Transistor
MOSFETs Monday 19 th September. MOSFETs Monday 19 th September In this presentation we will look at the following: State the main differences between.
Introduction to CMOS VLSI Design Lecture 3: CMOS Transistor Theory David Harris Harvey Mudd College Spring 2004.
VLSI Design CMOS Transistor Theory. EE 447 VLSI Design 3: CMOS Transistor Theory2 Outline Introduction MOS Capacitor nMOS I-V Characteristics pMOS I-V.
Lecture 11: MOS Transistor
1 CMOS Digital System Design MOS Transistor DC Operation.
10/8/2004EE 42 fall 2004 lecture 171 Lecture #17 MOS transistors MIDTERM coming up a week from Monday (October 18 th ) Next Week: Review, examples, circuits.
EE415 VLSI Design The Devices: MOS Transistor [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]
Lecture #16 OUTLINE Diode analysis and applications continued
Introduction to CMOS VLSI Design Lecture 3: CMOS Transistor Theory
(N-Channel Metal Oxide Semiconductor)
Outline Introduction – “Is there a limit?”
The metal-oxide field-effect transistor (MOSFET)
Introduction to CMOS VLSI Design Lecture 3: CMOS Transistor Theory David Harris Harvey Mudd College Spring 2004 from CMOS VLSI Design A Circuits and Systems.
11/3/2004EE 42 fall 2004 lecture 271 Lecture #27 MOS LAST TIME: NMOS Electrical Model – Describing the I-V Characteristics – Evaluating the effective resistance.
Design and Implementation of VLSI Systems (EN1600) lecture02 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison.
Week 8b OUTLINE Using pn-diodes to isolate transistors in an IC
Chap. 5 Field-effect transistors (FET) Importance for LSI/VLSI –Low fabrication cost –Small size –Low power consumption Applications –Microprocessors –Memories.
Dr. Nasim Zafar Electronics 1 - EEE 231 Fall Semester – 2012 COMSATS Institute of Information Technology Virtual campus Islamabad.
Lecture 2: CMOS Transistor Theory
VLSI design Lecture 1: MOS Transistor Theory. CMOS VLSI Design3: CMOS Transistor TheorySlide 2 Outline  Introduction  MOS Capacitor  nMOS I-V Characteristics.
EE314 IBM/Motorola Power PC620 IBM Power PC 601 Motorola MC68020 Field Effect Transistors.
MOS Capacitors ECE Some Classes of Field Effect Transistors Metal-Oxide-Semiconductor Field Effect Transistor ▫ MOSFET, which will be the type that.
Metal-Oxide-Semiconductor Field Effect Transistors
Lecture 19 OUTLINE The MOSFET: Structure and operation
Types of MOSFETs ECE 2204.
Dr. Nasim Zafar Electronics 1 - EEE 231 Fall Semester – 2012 COMSATS Institute of Information Technology Virtual campus Islamabad.
Lecture 3: CMOS Transistor Theory
EE 466: VLSI Design Lecture 03.
Transistors Three-terminal devices with three doped silicon regions and two P-N junctions versus a diode with two doped regions and one P-N junction Two.
EEE1012 Introduction to Electrical & Electronics Engineering Chapter 7: Field Effect Transistor by Muhazam Mustapha, October 2010.
Digital Integrated Circuits© Prentice Hall 1995 Introduction The Devices.
Qualitative Discussion of MOS Transistors. Big Picture ES220 (Electric Circuits) – R, L, C, transformer, op-amp ES230 (Electronics I) – Diodes – BJT –
ECE 342 Electronic Circuits 2. MOS Transistors
Chapter 5: Field Effect Transistor
1 Metal-Oxide-Semicondutor FET (MOSFET) Copyright  2004 by Oxford University Press, Inc. 2 Figure 4.1 Physical structure of the enhancement-type NMOS.
EXAMPLE 6.1 OBJECTIVE Fp = 0.288 V
DMT121 – ELECTRONIC DEVICES
1 Fundamentals of Microelectronics  CH1 Why Microelectronics?  CH2 Basic Physics of Semiconductors  CH3 Diode Circuits  CH4 Physics of Bipolar Transistors.
NOTES 27 March 2013 Chapter 10 MOSFETS CONTINUED.
NMOS PMOS. K-Map of NAND gate CMOS Realization of NAND gate.
ECE340 ELECTRONICS I MOSFET TRANSISTORS AND AMPLIFIERS.
ECE442: Digital ElectronicsCSUN, Spring-2010-Zahid MOS Transistor ECE442: Digital Electronics.
1 Chapter 5. Metal Oxide Silicon Field-Effect Transistors (MOSFETs)
Structure and Operation of MOS Transistor
EE141 © Digital Integrated Circuits 2nd Devices 1 Goal of this lecture  Present understanding of device operation  nMOS/pMOS as switches  How to design.
MOSFET Placing an insulating layer between the gate and the channel allows for a wider range of control (gate) voltages and further decreases the gate.
MALVINO Electronic PRINCIPLES SIXTH EDITION.
Introduction to MOS Transistors Section Outline Similarity Between BJT & MOS Introductory Device Physics Small Signal Model.
Introduction to CMOS VLSI Design Lecture 4: CMOS Transistor Theory David Harris Harvey Mudd College Spring 2007.
1 Other Transistor Topologies 30 March and 1 April 2015 The two gate terminals are tied together to form single gate connection; the source terminal is.
MOS Capacitors UoG-UESTC Some Classes of Field Effect Transistors Metal-Oxide-Semiconductor Field Effect Transistor ▫ MOSFET, which will be the.
MOSFET Current Voltage Characteristics Consider the cross-sectional view of an n-channel MOSFET operating in linear mode (picture below) We assume the.
Introduction to semiconductor technology. Outline –6 Junctions Metal-semiconductor junctions –6 Field effect transistors JFET and MOS transistors Ideal.
Metal-oxide-semiconductor field-effect transistors (MOSFETs) allow high density and low power dissipation. To reduce system cost and increase portability,
Field Effect Transistor (FET)
CP 208 Digital Electronics Class Lecture 6 March 4, 2009.
Farzana R. ZakiCSE 177/ EEE 1771 Lecture – 19. Farzana R. ZakiCSE 177/ EEE 1772 MOSFET Construction & operation of Depletion type MOSFET Plotting transfer.
Transistors (MOSFETs)
MOSFET V-I Characteristics Vijaylakshmi.B Lecturer, Dept of Instrumentation Tech Basaveswar Engg. College Bagalkot, Karnataka IUCEE-VLSI Design, Infosys,
course Name: Semiconductors
Damu, 2008EGE535 Fall 08, Lecture 21 EGE535 Low Power VLSI Design Lecture #2 MOSFET Basics.
EE314 IBM/Motorola Power PC620 IBM Power PC 601 Motorola MC68020 Field Effect Transistors.
DMT 241 – Introduction to IC Layout
Presentation transcript:

UNIT I MOS TRANSISTOR THEORY AND PROCESS TECHNOLOGY

TOPICS NMOS and PMOS transistors Threshold voltage Body effect Design equations Second order effects MOS models Small signal AC characteristics Basic CMOS technology

MOS TRANSISTOR MOS  Metal Oxide Semiconductor MOS transistor is a majority carrier device, current is the conducting channel b/w source & drain. 2 types of MOS transistor: n-MOS transistor p-MOS transistor Various symbol representation for n-MOS & p-MOS

n-MOS

n-MOS Majority carriers  electrons When +ive voltage is applied on gate, no. of electrons will be increased. So, conductivity of channel is increased. If Vg < Vt ,Then the channel is cutoff. Threshold voltage is the voltage at which MOS device starts to conduct.

p-MOS Majority carriers  holes

2 types of modes in n-MOS & p-MOS: Enhancement mode Depletion mode. n-MOS Enhancement mode: Device will be cut off when Vgs= 0 n-MOS Depletion mode: Device will conduct even if Vgs= 0 p-MOS Enhancement mode: Above Vtp, device will start to conduct. p-MOS Depletion mode: Device will be in conducting state even if Vgs= 0

Conduction characteristics

n-MOS ENHANCEMENT TRANSISTOR It has Moderately doped p - type silicon substrate In that p-substrate, Heavily doped n + source and drain. Channel – a thin insulating layer made up of Silicon dioxide (SiO 2) Gate –polycrystaline silicon (polysilicon)

Working principle When Vgs= 0, Vds is applied. There is no current flow b/w source & drain. When positive voltage is applied to gate, electric field is produced across p-substrate. It attracts electrons towards the channel. It is continued when gate voltage is increased further, the region below gate will be converted from p-type to n-type. So the channel becomes n-type(n-channel).

Three types of modes of MOS transistor: Accumulation mode Depletion mode Inversion mode

Accumulation mode In this mode Vgs < Vt Initially p-substrate is having holes only.

Depletion mode In this mode Vgs =Vt Depletion region is created in this mode . Vgs is increased and reach Vt So holes are repelled from the channel. Because of this, depletion region is created.

Inversion mode In this mode Vgs > Vt Voltage increased further, so electrons are attracted towards the region below gate. So, the layers of electrons will be formed below the gate. Bcoz of this layer, this mode is known as inversion mode.

Operation regions of MOS transistor Cut-off mode Non-saturated mode(linear or resistive or unsaturated mode) Saturated mode

Cut-off mode When Vgs > Vt and Vds = 0. Depletion layer is created. So the region is completely cut-off.

Non-saturated mode When Vds < Vgs - Vt Deep channel is created in this mode. Inversion region is weak in this region.

Saturated mode Here, Vds > Vgs - Vt and Vgd < Vt The channel becomes pinched off. Inversion is strong. Channel current is controlled by gate voltage & it is independent of drain voltage

Ids depends following: Distance b/w source & drain Channel width Threshold voltage Thickness of oxide layer Dielectric constant of gate insulator Carrier mobility(μ)

Conclusion Three conduction regions are available in nMOS enhancement transistor. Cut-off region (no current flow) Non-saturated (Id depends Vg and Vd) Saturated mode (Id independent of Vds )

p-MOS ENHANCEMENT TRANSISTOR