Pass Transistor Logic EMT 251. Pass Transistor Logic I n p u t s Switch Network Out A B B B.

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Presentation transcript:

Pass Transistor Logic EMT 251

Pass Transistor Logic I n p u t s Switch Network Out A B B B

Pass Transistor Logic Gate is static – a low-impedance path exists to both supply rails under all circumstances NMOS transistors only No static power consumption Ratioless (W/L) Bidirectional (versus undirectional)

Complementary Pass Transistor Logic (CPL) Dual-rail form of pass transistor logic Avoids need for ratioed feedback Optional cross-coupling for rail-to-rail swing

Example: AND/NAND gate

Example: OR/NOR gate

Example : XOR/XNOR gate

Cascaded Technique Wrong!! Correct!!

Draw a CMOS circuit based on this logic equation. Use a minimum number of transistors.

Transmission Gate Logic EMT 251

Transmission Gate Logic (TG) Most widely used solution Use both NMOS and PMOS in parallel Can be used for logic circuit implementation Full swing bidirectional switch controlled by the gate signal (strong ‘0’ and ‘1’) P N A(V in ) B (V out ) s s A (V in ) B (V out ) s s

The MOS transistor pass gate passes a good passes a bad 1 passes a bad 0 passes a good 1 nMOS pMOS Near Short CCT Resistance small

TG as a Tristate Buffer B=A ( or Z when S=0 ) s A A(V in ) S Tn Tp B (V out ) 0 0 off off Z (high impedance state (blocks logic flow)) 0 1 on off 0 (nMOS passes strong 0, pMOS off when V out <V thp ) 1 0 off off Z (high impedance state (blocks logic flow)) 1 1 off on 1 (pMOS passes strong 1, nMOS off when V out >V dd -V thn ) In steady state

Example : OR gate

Example : AND gate

Example : XOR gate