1 High Frequency Model of Sub-100nm High-k RF CMOS ○M. Nakagawa 1, J.Song 1, Y. Nara 2, M. Yasuhira 2 *, F. Ohtsuka 2, T. Arikado 2 **, K. Nakamura 2, K. Kakushima 1, P. Ahmet 1, K. Tsutsui 1 and H. Iwai 1 1 Tokyo Institute of Technology, 4259, Nagatsuta-cho,Midoriku,Yokohama, Japan 2 Semiconductor Leading Edge Technologies, Inc.(SELETE),Japan * Current affiliation: Matsushita Electric Industrial Co.Ltd., Japan **Current affiliation: Tokyo Electron LTD., Japan

2  Miniaturization of MOSFET improves RF characteristics  CMOS technology apply to RF application Low cost Low power dissipation and high integration RF Technology is necessary in future ubiquitous society and broadband society RF CMOS can be applied Background ～ＲＦ technology ～ Fig.1 Application spectrum : ITRS2005

3 High-k and RF CMOS Concerns about High-k MOSFET in RF region ① Fall of dielectric constant in RF region by dielectric dispersion --- High-k is not High-k in RF region? ② Degradation of RF characteristics by lower mobility ③ High interface state Limit of miniaturization draws near !! One is the limit of thin film of gate insulator Igb IgcdIgcs IgdIgs Electrical isolation breaks down leading to high dissipation High-k insulator resolves this problem High-k is hot technology in future MOSFET Leakage current But….. Dielectric dispersion Orientation polarization Ionic polarization Electronic polarization ε(0) 1/τω0ω0 ωeωe

4 HfSiON (EOT=1.5nm) SiON (EOT=1.5nm) Gate Length L g HfSiON(64nm) SiON(51nm) Number of finger 12 （ W=5μm ） Device structure HfSiON MOSFET structure silicide HfSiON SiN Si silicide SiONSiN Si SiON MOSFET structure GGGGG SSSDD M1 STI VIA1 63.9nm 61.7nm 62.3nm 65.5nm 65.3nm Increasing gate width with multi gate finger, the gate resistance become small N f : Number of finger

5 DC characteristics and f T, f max Vg (V) gm SiON HfSiON SiON:L/W=51nm/60  m HfSiON:L/W=64nm/60  m Vg (V) Id[A] SiON HfSiON Id[A] Vd (V) SiON HfSiON SiON device has better DC characteristics due to electron mobility f T : SiON device is higher than HfSiON device f max : There are little difference between two devices SiON ft = 155GHz HfSiON ft= 131GHz SiON fmax = 53GHz HfSiON fmax= 58GHz Freq H 21 [dB]Ugain[dB]

6 f T,f Fig. Gate length dependency Gate length [nm] [GHz] fTfT f max Finger length W f [um] Morifuji, et al., VLSI technology 1999, pp High f max is gotten as simulation result indicates f t grows with gate length, however f max falls down with gate length H 21 Ugain Frequency [GHz] [dB] W f =2um f T = [GHz] f max = [GHz] HfSiON: Lg=58.6nm H 21 Ugain W f =2um Frequency [GHz] f T = [GHz] f max = [GHz] [dB] SiON: Lg=58.6nm

7 How to estimate gate capacitance Rg Cgate Rd Rs GD S g ox Most simple equivalent Vd=0V Z 11 =Rg+1/(jωCgate+gox)+Rseries Cgate=imag(Z 11 -Rg-Rseries) -1 Rg gox Cgate Rseries Z 11 ∋ Rs, Rd Gate capacitance is got by deembedding series resistance from measured Z 11

8 High frequency gate capacitance measurement Capacitance [fF] HfSiON: Lg=58.6nm 15GH ｚ 10GH ｚ 20GH ｚ Vg[V] Capacitance [fF] 15GH ｚ 10GH ｚ 20GH ｚ SiON: Lg=58.6nm Vg[V] Capacitance [fF] Including overlap capacitance Intrinsic gate capacitance Vg[V] Capacitance [fF] Vg[V] 10GHz 20GHz 10GHz 20GHz Gate length L [nm] Gate length L+ΔL [nm] Gate capacitance is constant at 10GHz~20GHz Dielectric dispersion is not seen in this region Frequency [GHz] [fF] HfSiON SiON

9 Conclusion RF characteristics reflect DC characteristics -High electron mobility cause high f T f max depend on finger length (Wf) -High f max is gotten at Wf = 2um, which checks with simulation result Gate capacitance degradation due to dielectric dispersion is not seen at 10GHz~20GHz High-k MOSFET has potential ability even if at RF region