Module R3 Process Scheduling. Module R3 involves the creation of a simple “Round Robin” dispatcher. The successful completion of this module will require.

Slides:



Advertisements
Similar presentations
Register In computer architecture, a processor register is a small amount of storage available on the CPU whose contents can be accessed more quickly than.
Advertisements

Registers of the 8086/ /2002 JNM.
R4 Dynamically loading processes. Overview R4 is closely related to R3, much of what you have written for R3 applies to R4 In R3, we executed procedures.
CPU Review and Programming Models CT101 – Computing Systems.
CS 450 Module R3. Next Week R2 is due next Friday ▫Make sure to correct all errors with R1 ▫Correct errors in the documentation as well, it will be checked.
There are two types of addressing schemes:
MICROPROCESSORS TWO TYPES OF MODELS ARE USED :  PROGRAMMER’S MODEL :- THIS MODEL SHOWS FEATURES, SUCH AS INTERNAL REGISTERS, ADDRESS,DATA & CONTROL BUSES.
Introduction to 8086 Microprocessor
CEN 226: Computer Organization & Assembly Language :CSC 225 (Lec#3) By Dr. Syed Noman.
Procedures and Stacks. Outline Stack organization PUSH and POP instructions Defining and Calling procedures.
Azir ALIU 1 What is an assembly language?. Azir ALIU 2 Inside the CPU.
Tips for R3: Process Initialization When we create processes to represent our 5 test procedures we must correctly initialize its context by placing values.
Lecture 6 Machine Code: How the CPU is programmed.
1 Storage Registers vs. memory Access to registers is much faster than access to memory Goal: store as much data as possible in registers Limitations/considerations:
1 Hardware and Software Architecture Chapter 2 n The Intel Processor Architecture n History of PC Memory Usage (Real Mode)
80x86 Processor Architecture
Riyadh Philanthropic Society For Science Prince Sultan College For Woman Dept. of Computer & Information Sciences CS 251 Introduction to Computer Organization.
The 8086 Microprocessor The 8086, announced in 1978, was the first 16-bit microprocessor introduced by Intel Corporation 8086 is 16-bit MPU. Externally.
System Calls 1.
An Introduction to 8086 Microprocessor.
FINAL MPX DELIVERABLE Due when you schedule your interview and presentation.
Types of Registers (8086 Microprocessor Based)
CS 450 Module R3. Today's Agenda R1 and R2 review Module R3 Introduction Schedule R1 Grading Next Week Module R4 Introduction.
Strings, Procedures and Macros
UHD:CS2401: A. Berrached1 The Intel x86 Hardware Organization.
Chapter 2 Parts of a Computer System. 2.1 PC Hardware: Memory.
Block diagram of 8086.
University of Tehran 1 Microprocessor System Design Omid Fatemi Machine Language Programming
University of Sargodha, Lahore Campus Prepared by Ali Saeed.
Interrupts And tips for R3. What is an interrupt? An interrupt is an electronic signal that indicates an event (possibly caused by hardware or the program.
MODULE 5 INTEL TODAY WE ARE GOING TO DISCUSS ABOUT, FEATURES OF 8086 LOGICAL PIN DIAGRAM INTERNAL ARCHITECTURE REGISTERS AND FLAGS OPERATING MODES.
Microprocessor Fundamentals Week 2 Mount Druitt College of TAFE Dept. Electrical Engineering 2008.
Internal Programming Architecture or Model
1 x86 Programming Model Microprocessor Computer Architectures Lab Components of any Computer System Control – logic that controls fetching/execution of.
Intel 8086 MICROPROCESSOR ARCHITECTURE
Computer Organization & Assembly Language University of Sargodha, Lahore Campus Prepared by Ali Saeed.
Microprocessors CSE- 341 Dr. Jia Uddin Assistant Professor, CSE, BRAC University Dr. Jia Uddin, CSE, BRAC University.
I NTEL 8086 M icroprocessor بسم الله الرحمن الرحيم 1.
ΜComputer Structure μProcessor Memory Bus System I/O Ports.
Chapter 12 Processor Structure and Function. Central Processing Unit CPU architecture, Register organization, Instruction formats and addressing modes(Intel.
Assembly language programming
Processes and threads.
Instruction set Architecture
Format of Assembly language
UNIT Architecture M.Brindha AP/EIE
Introduction to 8086 Microprocessor
8086 Microprocessor.
Computer Organization & Assembly Language Chapter 3
COURSE OUTCOMES OF MICROPROCESSOR AND PROGRAMMING
University of Gujrat Department of Computer Science
Intel 8088 (8086) Microprocessor Structure
Basic of Computer Organization
Defining Types of data expression Dn [name] expression Dn [name]
Symbolic Instruction and Addressing
Introduction to Assembly Language
BIC 10503: COMPUTER ARCHITECTURE
Data Addressing Modes • MOV AX,BX; This instruction transfers the word contents of the source-register(BX) into the destination register(AX). • The source.
Intel 8088 (8086) Microprocessor Structure
8086 Registers Module M14.2 Sections 9.2, 10.1.
Morgan Kaufmann Publishers Computer Organization and Assembly Language
Symbolic Instruction and Addressing
CS 301 Fall 2002 Computer Organization
Symbolic Instruction and Addressing
Lecture 06 Programming language.
Computer Architecture CST 250
Unit-I 80386DX Architecture
Chapter 6 –Symbolic Instruction and Addressing
Process.
CSC 497/583 Advanced Topics in Computer Security
8086 microprocessior PIN OUT DIAGRAM OF  Power supply and frequency signals  It uses 5V DC supply at V CC pin 40, and uses ground at V SS pin.
Presentation transcript:

Module R3 Process Scheduling

Module R3 involves the creation of a simple “Round Robin” dispatcher. The successful completion of this module will require that you read and understand chapters I2, I3, and R3 from your project manual. Successful completion of this module requires that you understand: Interrupt handlers, context switching, and the role of the system stack and registers. (I2)

Components of R3  Add 1 temporary command to your command handler:  This command exists to allow the testing of your “dispatcher” and “system call handler”.  This operation will be responsible for creating and initializing 5 PCB’s to represent 5 processes which will be dispatched.

 You will implement 2 internal functions the “dispatcher” and the “system call handler”  The “dispatcher” is responsible for locating the next ready process and performing a context switch to begin executing that process  The “system call handler” will be responsible for handling “system” calls issued by the running processes. These system calls will trigger an interrupt that will result in either the current process leaving the running state, and another being dispatched, or the current process being terminated  Both of these functions will be structured as interrupt handlers.

Addresses, the stack, and registers  The 8086 processor uses an addressing scheme called “segmented addressing”  A pair of 16 bit values is needed to create an address: A segment number and an offset.  A segment # represents the startling location of a 64k byte region called a segment  The offset represents a relative address within that segment  Addresses are typically represented as XXXX:YYYY where XXXX is the segment #, and YYYY the offset, both values are assumed to be in hexadecimal

 To facilitate addressing (so every instruction needn’t supply 2 separate 16-bit address components) bit segment registers (containing segment #’s) are maintained:  Data Segment: contains the static (persistent) data variables used by a program. This is stored in the DS register. This value is automatically used for memory references that fetch and store data.  Code Segment: Contains the instructions of the program being executed. This is stored in the CS register. This value is automatically used when instructions are being fetched. A 16-bit register called the IP (instruction pointer) is used for determining the address of the next instruction to be executed.

 Stack Segment: the storage area for the “current stack”. This is stored in the SS register. The stack is used for temporarily storing addresses and data, both explicitly via push and pop instructions, and implicitly during subroutine calls and interrupts. (like local variables.. Etc)  Extra Segment: this is a spare segment, whose location is stored in the ES register.

The Stack  The stack is a data buffer. At any time a set of data items occupies a contiguous region with in the buffer.  One end called the bottom is fixed, the other end called the top is movable.  Generally data is added and removed only at the top of the stack. A push adds a data item, a pop removes a data item.  A pointer (called the stack pointer) must be maintained POINTING to the top of the stack.

 In the 8086, stacks are designed to grow from higher addresses to lower addresses  Each push operation will:  Decrement the stack pointer by 2  Store a data word at the new address given by the stack pointer  Each Pop operation will:  Fetch a data word from the address given by the stack pointer  Increment the stack pointer by 2  One important usage of the stack is that in C, function parameters are frequently pushed onto the stack before calling a function. Data 10A bottom top

Addressing registers:  Additionally, there are 4 registers that can be used for offset calculation:  SP: The stack pointer is used in pushing values and addresses on the stack, and for popping these from the stack.  BP: the “base pointer” can be used to compute offsets for both the stack segment and the data segment. In turbo C it is often used as a temporary register for saving the value of the stack pointer.  SI and DI: Source and destination indexes. These are used to compute the offset of data

Data Registers  The 8086 also has 4 16-bit data registers (aka. General registers or arithmetic registers) AX, BX, CX, & DX  These registers can also be treated as 8 8bit registers: AH, AL, BH, BL, CH, CL, DH, DL (H refers to the high order byte, and L the low order)  A,B,C & D stands for accumulator, base, count, and data.  When saving and restoring the context of processes we must ensure that values for these registers are not corrupted.

Program status word  One last register to concern ourselves with: is the program status word  This register contains condition codes, and bits that determine whether or not certain interrupts can be generated.  For R3, we will be interested in the 9 th bit or the IF (interrupt enable flag).  During interrupt processing we will disable interrupts by setting this bit to 0. We must later restore it.

Dispatcher Initialization  This involves adding a new command to your COMHAN called “dispatch”.  This will invoke a function which will perform the following:  Allocate and initialize 5 PCB:  These will be linked to 5 test procedures provided in “PROCS_R3.C” on the MPX support web pages.  These procedures will be statically compiled and linked to your MPX executable, by adding them to your project.  We need to store the starting address of each function in its associated PCB.  Values for initialization are described in chapter R3 of your project manual

 Insert all 5 PCB’s on the ready queue. We will only need to use the FIFO insertion method.  Link the int 60h interrupt to your system call handler. (accomplished via a call to a new support routine sys_set_vec )  Call your dispatcher to begin execution:

How the processes execute  The names of the test procedures are: test1-R3 through test5-R3.  Each process is designed as a simple loop that prints out a message a set number of times. Test1-R3 prints out the message once… and so forth  Processes once dispatched are not preempted, nor are they subject to timeout.  Each process will voluntarily give up control of the CPU using a call to “sys_req” which will generate a system call interrupt. Processes call “sys_req” with two possible op_code values:  IDLE: which will return the process to the ready queue  EXIT: which is a request to terminate the process, and free the PCB.

Processing system call interrupts  You will need to write an interrupt handler called “sys_call” whose purpose is to catch and process system call interrupts generated by executing processes.  In the declaration of the prototype of this function we will use the TURBO C keyword “interrupt” void interrupt sys_call(void);  The interrupt keyword generates executable assembler language statements which automatically save the registers: AX, BX, CX, DX, ES, DS, SI, DI, & BP On the stack automatically. (in this order). Similarly code is added at the end of the procedure to automatically restore these registers.

 “sys_call” Notes:  Sys_req prepares for the system call interrupt by placing the parameters it was called with onto the “current” stack. It then generates interrupt 60, using the int 60h machine instruction.  When “sys_call” is invoked it is responsible for retrieving these values and interpreting what type of action has been requested.  Additionally, the interrupt hardware pushed the flag register, CS and IP onto the stack.  So when “sys_call” is invoked the status of the stack is:

(previous stack contents) Buffer length pointer parameter (*count) Buffer address parameter (*buffer) Device_id parameter Op_code parameter FlagCSIPAXBXCXDXESDSSIDIBP We will need to retrieve the contents of the 1 st four parameters to identify the type of request made by the calling process. (pseudo code can be found on page 11)

 Depending on the type of request made:  Switch to a temporary stack to avoid stack overflow.  If a request to IDLE has been issued: The current processes status is switched to “ready” and the process is placed back on the ready queue.  If a request to EXIT has been issued: The process is deleted using your function from R2.  A call to your “dispatcher” is issued to begin execution of the next process.  (Note) the dispatcher will not return to this function!

The dispatcher  The dispatcher “dispatch” will be structured as an interrupt handler, but will be invoked via a regular function call.  It is responsible for:  Remove the PCB at the front of the ready queue  Change the process status to running, and set a pointer to this PCB identifying it as the running process.  COPY the stack pointer (_SS and _SP) from the processes PCB to the actual stack pointer, to prepare for context restoration.  When this function “ends” execution will resume in the newly restored process!!!! It will never return to the interrupt handler!

Notes of concern  We do need to save the initial state of the MPX the first time that the dispatcher is called.  There fore we need to declare global variables to store the SS and SP of the MPX. These will be restored when there are no more processes in the ready queue. Restoration of these variables will return control to the COMHAN and we will be able to terminate execution of MPX.

Complete outline for the dispatcher: if sp_save is null, ss_save = _SS sp_save = _SP remove the PCB at the head of the ready queue if a PCB was found set cop to this PCB set _SS and _SP to the PCB's stack pointer else set cop to NULL set _SS to ss_save set _SP to sp_save end if "return from interrupt"