Renesas Electronics America Inc. © 2010 Renesas Electronics America Inc. All rights reserved. ID 110C:Microcontroller Technology Roadmap for Ubiquitous Computing Ritesh Tyagi Director - MCU Product/Segment Marketing 12 & 13 October 2010 Version: 1.0 Performance and power paradigm

2 © 2010 Renesas Electronics America Inc. All rights reserved. Mr. Ritesh Tyagi Director – MCU Products & Solutions Marketing Product Marketing and Segment Marketing responsibilities for 8,16 and 32-bit MCU families MSEE and MBA from University of Allahabad, India More than 15 years of experience in MCU/MPU products and applications MCU product definition and marketing launch Solution development for key segments like consumer, Medical industrial and communication Embedded software designs experience for consumer electronics

3 © 2010 Renesas Electronics America Inc. All rights reserved. 3 Innovations and Ubiquitous Computing

4 © 2010 Renesas Electronics America Inc. All rights reserved. 4 MCUs & MPUs Driving Ubiquitous Computing Renesas provides innovative Microcontrollers and Microprocessors solutions for supporting Ubiquitous computing

5 © 2010 Renesas Electronics America Inc. All rights reserved. Agenda Key Trends in Microcontrollers Overview of Renesas MCU products and solutions 8/16 bit: R8C, 78K 32 bit : V850, RX and SH Summary Q/A

6 © 2010 Renesas Electronics America Inc. All rights reserved. Key Takeaways By the end of this session you will be able to: understand the relative positioning of Renesas’ microcontroller solutions know the future technology roadmap

7 © 2010 Renesas Electronics America Inc. All rights reserved. Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** Solutions for Innovation ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis).

8 © 2010 Renesas Electronics America Inc. All rights reserved. 8 Renesas Technology and Solution Portfolio Microcontrollers & Microprocessors #1 Market share worldwide * Analog and Power Devices #1 Market share in low-voltage MOSFET** ASIC, ASSP & Memory Advanced and proven technologies * MCU: 31% revenue basis from Gartner "Semiconductor Applications Worldwide Annual Market Share: Database" 25 March 2010 **Power MOSFET: 17.1% on unit basis from Marketing Eye 2009 (17.1% on unit basis). Solutions for Innovation

9 © 2010 Renesas Electronics America Inc. All rights reserved. PerformanceIntegration Power Tools Complexity Longevity Microcontroller Trends

10 © 2010 Renesas Electronics America Inc. All rights reserved. 10 © 2010 Renesas Electronics America Inc. All rights reserved. MIPS Year Trends of CPU Performance

11 © 2010 Renesas Electronics America Inc. All rights reserved. 11 © 2010 Renesas Electronics America Inc. All rights reserved Year x8 Trends of Embedded Memory Capacity

12 © 2010 Renesas Electronics America Inc. All rights reserved. What’s most important when choosing a microprocessor? Source: 1010 Embedded Market Survey by CMP (EETimes…) Eco-System Constitute Peripheral compatibility, S/W compatibility Sample code and drivers Development tool

13 © 2010 Renesas Electronics America Inc. All rights reserved. 13 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive  Legacy Cores  Next-generation migration to RX High Performance CPU, FPU, DSC Embedded Security  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security  Up to 165 DMIPS, 90nm process  500uA/MHz, 2.5 uA standby  Ethernet, CAN, USB, Motor Control, TFT Display  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial High Performance CPU, Low Power  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration Ultra Low Power  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch General Purpose

14 © 2010 Renesas Electronics America Inc. All rights reserved. 14 SH: Performance Powerhouse Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive High Performance CPU, FPU, DSC High Performance CPU, Low Power Key Attributes Single, Dual and Quad Core 100 MHz Single Cycle Flash Up to 3.75MB Flash Up to 1.5MB SRAM Up to 3.75MB Flash Up to 1.5MB SRAM External Memory I/F NAND, NOR, SDRAM TFT LCD Driver IP Video TFT LCD Driver IP Video Ethernet (1G), CAN, USB (Host, Device) Ethernet (1G), CAN, USB (Host, Device) Third Party Support including Linux

15 © 2010 Renesas Electronics America Inc. All rights reserved. 15 © 2010 Renesas Electronics America Inc. All rights reserved. SH-2A Executes 2 Instructions/Clock Shift Pipeline Branch Pipeline Multiplier Pipeline Memory Pipeline Inst Queue 1 Inst Queue 2 Inst Decode 1 Inst Decode 2 Load/Store Pipeline Arithmetic Pipeline Integer Unit32/64-bit Floating Point Unit 2.0DMIPS/MHz (v2.1) when executing from Flash 200MHz, 5-stage Pipeline Core 2 Instructions per Clock Separate FPU Pipeline Integer Pipeline 1 Integer Pipeline 2 8 Individual Pipelines

16 © 2010 Renesas Electronics America Inc. All rights reserved. SH-2A Fast Interrupt Response Drawing not to scale CPU Latency Save Context (By Complier) User Code Restore Context Typical MCUs INT Trigger 9 Cycles CPU Latency + Save Context User Code Restore Context SH-2A MCU 15 Reg. Banks LIFO HW saves the context in register bank LIFO One Primary Reg. Bank + Latency SH7216Cortex-M3ARM7TDMIPIC32 MCU Interrupt Latency – 4218 – 40+ Based on values from specification stated in product datasheet

17 © 2010 Renesas Electronics America Inc. All rights reserved. SH-2/2A– Connectivity and Graphic Solutions Connectivity focus Graphic & Digital Audio Focus SH 7239

18 © 2010 Renesas Electronics America Inc. All rights reserved. 18 V850: Performance with Low Power Consumption Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive High Performance CPU, FPU, DSC  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial High Performance CPU, Low Power Key Attributes 5 & 7 Stage pipeline up to 2.5DMIPS/MHz MAC, FPU, CRC, 1clk Shifter… MAC, FPU, CRC, 1clk Shifter… 64K~1MB Flash Up to 80KB RAM Data Flash 64K~1MB Flash Up to 80KB RAM Data Flash pin package 5x5mm~ pin package 5x5mm~ Low EMI High EMS Low EMI High EMS Ethernet CAN, USB, FlexRey Ethernet CAN, USB, FlexRey Low Power Consumption 600uA/MHz (active), 1.5uA Standby Low Power Consumption 600uA/MHz (active), 1.5uA Standby

19 © 2010 Renesas Electronics America Inc. All rights reserved. 19 © 2010 Renesas Electronics America Inc. All rights reserved. V850 Bus Architecture CPU Instruction Fetch Operand Data Access Instruction Bus Data Bus On-chip Flash On-chip RAM Bus Arbitration External Memory External Devices On-chip Peripherals DMA Control External Bus Control V850 MCU

20 © 2010 Renesas Electronics America Inc. All rights reserved. Enhanced Pipeline Delivering High Performance Instruction Fetch Operand Decode Execute Memory Write Back Branch/LD Pipe Memory Write Back Instruction Fetch Data Forward Early address calculation reduces branch penalty or load cycle Load/Store Buffer reduces 1 clock cycle With Load/Store Buffer Early Address Calculation Regular 5-stage pipeline Enhanced 5-stage pipeline delivers 1.9 DMIPS/MHz

21 © 2010 Renesas Electronics America Inc. All rights reserved. 21 V850ES Energy Efficiency 1 Source: 2 Based on values from specification stated in product datasheet 3 Based on internal benchmarking DMIPS (2.1) 2 DMIPS/ MHz CPU Freq. 1 Run Current 3.3V 25C 1 Energy Efficiency A Cortex M3-based MCU 40 DMIPS MHz (Flash access needs 1 wait state) 17.3mA0.4mA/DMIPS V850ES/Jx3-L39 DMIPS1.9520MHz12mA0.3mA/DMIPS Flash ON/OFF Powered OFF during no fetch cycle (e.g. DIV execution, 16bit instruction vs. 32bit fetch) CPU V850/JG3-L Flash ON/OFF CPU Always Powered ON 1. RAM CPU 2. Activate all RAM cell RAM CPU Activate only accessed RAM V850/JG3-L

22 © 2010 Renesas Electronics America Inc. All rights reserved. V850 Family Roadmap Ultra Low Power Design Low Power Design 5-stage pipeline 7-stage pipeline V850ES 20~64MHz, 1.9~2.1 DMIPS/MHz V850E1 30~150MHz, 1.9~2.1 DMIPS/MHz V850E2 32~200MHz, 1.9~2.5 DMIPS/MHz Now2011 ASSPs Dashboard etc. ASSPs Dashboard etc. Fx3(-L) CAN, ~1M/60K, ~48MHz Fx3(-L) CAN, ~1M/60K, ~48MHz Sx3(-H) IE&CAN, ~1M/76K, 48MHz Sx3(-H) IE&CAN, ~1M/76K, 48MHz Automotive Enhance connectivity ASSPs Dashboard etc. ASSPs Dashboard etc. Fxx- Next FlexRay, Over 100MHz Fxx- Next FlexRay, Over 100MHz Sxx-Next MOST-IF, Over 100MHz Sxx-Next MOST-IF, Over 100MHz Fxx-L (Next) CAN, Ultra LP, 48MHz Fxx-L (Next) CAN, Ultra LP, 48MHz Automotive More RT performance MN4 ~1M/64K, 200MHz Ether & USB MN4 ~1M/64K, 200MHz Ether & USB Mxx- Next 1MB Flash, 180MHz Ether & USB Mxx- Next 1MB Flash, 180MHz Ether & USB Real-time ME3 168KB iRAM, 200MHz ME3 168KB iRAM, 200MHz MA3 ~512K/32K, 80MHz MA3 ~512K/32K, 80MHz ASSPs Inverter control ASSPs Inverter control Real-time Jx3-E Ether, ~512K/124K, 50MHz Jx3-E Ether, ~512K/124K, 50MHz Jx3(-H,U) USB, ~512K/56K, ~48MHz Jx3(-H,U) USB, ~512K/56K, ~48MHz Jx3-L Ultra LP, ~1M/80K, 20MHz Jx3-L Ultra LP, ~1M/80K, 20MHz ASSPs Industrial automation ASSPs Industrial automation Industrial Keep LP, more memory Jxx-H (Next) 2MB Flash, 100MHz+ Ether & USB Jxx-H (Next) 2MB Flash, 100MHz+ Ether & USB Jxx-Next USB, 2MB Flash, 64MHz Jxx-Next USB, 2MB Flash, 64MHz Jxx-L (Next) Ultra LP, 2MB Flash, 32MHz Jxx-L (Next) Ultra LP, 2MB Flash, 32MHz Industrial

23 © 2010 Renesas Electronics America Inc. All rights reserved. 23 RX: Performance without Penalty High Performance CPU, FPU, DSC Key Attributes 100 MHz Single Cycle Flash 5 Stage Pipeline, FPU, MAC DSP Instruction 5 Stage Pipeline, FPU, MAC DSP Instruction 64K~1MB Flash Up to 128KB RAM Data Flash 64K~1MB Flash Up to 128KB RAM Data Flash pin package 5x5mm~ pin package 5x5mm~ TFT LCD Display 12-bit A/D (1 MSPS) TFT LCD Display 12-bit A/D (1 MSPS) Ethernet CAN, USB (Host, Device) Ethernet CAN, USB (Host, Device) Low Power Consumption 500uA/MHz (active), 2.5uA Standby Low Power Consumption 500uA/MHz (active), 2.5uA Standby High Performance CPU, Low Power Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial High Performance CPU, Low Power  Legacy Cores  Next-generation migration to RX  Up to 165 DMIPS, 90nm process  500uA/MHz, 2.5 uA standby  Ethernet, CAN, USB, Motor Control, TFT Display

24 © 2010 Renesas Electronics America Inc. All rights reserved. Typically SRAM Typically Flash Memory RX Flash is 10 nsec, or 100 MHz zero-wait RX SRAM is also 10 nsec RX600 CISC CPU 5-STAGE PIPELINE 5 STAGES OF PIPELINE F = FETCH INSTRUCTION D = DECODE INSTRUCTION E = EXECUTE INSTRUCTION M = READ OR WRITE MEMORY W = WRITE BACK TO REGISTER Inst 64bit path Instruction Data 32bit path Operand (Data) ENHANCED HARVARD ARCHITECTURE WRITE BUFFER For Slow Memory PRE-FETCH QUEUE (PFQ) Holds 4 to 32 Instructions for Slower Memory Memory Interface MHz CPU Core 1.65 DMIPS/MHz 16 x 32bit General Purpose Registers 9 x 32bit Control Registers RX Architecture … CPU Core and Pipeline 32bit Floating Point Unit 16x16 or 32x32 MAC, 48bit or 80bit Result 32 x 32 DIV or MULT, 32bit or 64bit Result Memory Protect Unit Interrupt Control On-Chip Debug ENHANCED HARVARD ARCHITECTURE 5-STAGE PIPELINE 64bits Buffer Only for Writes FDEMW TICK FD F E D F M E D F W M E D F F W M E D D F W M E E D F W M M E D F W E E E E E W M E D F Achieves One Clock-Per-Instruction (CPI)

25 © 2010 Renesas Electronics America Inc. All rights reserved. RX Architecture … Memory Interface SRAM, 100MHz Access 64 bits Flash Memory, 100MHz Access 64 bits 100 MHz Flash and SRAM means zero wait-state code and data access PFQ minimizes stalls from slower memory, such as external memory Bus master of Internal Bus 1 is the CPU Next we look at Internal Bus 2… External Bus Pins for CPU External Bus Controller (BSC) 32 bits Internal Main Bus 1 32 bits Bus Bridge Peripherals RX600 MCU RX600 CPU 100MHz PIPELINEPFQ BUFFER 64b INST 32b DATA Bus Master of Internal Main Bus 1 BUS MATRIX

26 © 2010 Renesas Electronics America Inc. All rights reserved. CNTL Multiple Peripheral Busses to Spread Bandwidth Loading CNTL Internal Main Bus 2 32 bits DTC (bus master) Bus Bridge DMAC (bus master) Ethernet DMAC (bus master) RX Architecture … System Interface RX600 CPU 100MHz PIPELINEPFQ BUFFER 64b INST 32b DATA Bus Master of Internal Main Bus 1 64 bits Bus Bridge EXDMA (external bus master) 32 bits Internal Main Bus 1 32 bits RX600 MCU SRAM, 100MHz Access Flash Memory, 100MHz Access External Bus Controller (BSC) 4 Transfers at one time, plus 2 interleaving! BUS MATRIX External Bus Pins for CPU One External Device Another External Device Ethernet MAC 2K FIFO FIFO 2K Communication (USB, CAN, SCI, SPI, I2C) Timers (MTU, TPU, TMR, CMT) Analog (DAC, ADC, PGA) GPIO System Control (DMA, E2P, ICU, LVD, RTC, WDG, CLKS)

27 © 2010 Renesas Electronics America Inc. All rights reserved. RX Family Roadmap

28 © 2010 Renesas Electronics America Inc. All rights reserved. RX600 Series Portfolio LGA64 5x5mm 0.5mm LQFP64 10x10mm 0.5mm LQFP80 14x14mm 0.65mm LGA85 7x7mm0. 65mm LQFP100 14x14mm 0.5mm LQFP112 20x20mm 0.65mm LQFP144 20x20mm 0.5mm LGA145 9x9mm 0.65mm BGA176 13x13m m0.8mm

29 © 2010 Renesas Electronics America Inc. All rights reserved. 29 R8C: Lowest Cost MCUs for 8-bit Applications  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch General Purpose Key Attributes 64KB Free Compiler, 1-wire debug 64KB Free Compiler, 1-wire debug 14 to 100 pins 2KB to 128 KB Flash, up to 10 KB SRAM 14 to 100 pins 2KB to 128 KB Flash, up to 10 KB SRAM 1.8V to 5.5V, 20 / 40 MHz Internal Osc. 1.8V to 5.5V, 20 / 40 MHz Internal Osc. Non-LCD, Segment LCD and ASSP Line-up 16-bit CPU + MUL, Data Transfer Controller 16-bit CPU + MUL, Data Transfer Controller Internal POR, LVD, Watchdog Internal POR, LVD, Watchdog Capacitive Sensor Control Unit, BGO Data Flash Capacitive Sensor Control Unit, BGO Data Flash Embedded SecurityUltra Low Power Embedded Security  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration Ultra Low Power

30 © 2010 Renesas Electronics America Inc. All rights reserved. R8C Family Roadmap SEG LCD GENERAL ASSP xT Capacitive Touch: 18/22 ch 3xT Capacitive Touch: 18/22 ch 3xW Automotive: pin CAN, LIN 3xW Automotive: pin CAN, LIN L3xC up to 416 pixels, DTC, BGO L3xC up to 416 pixels, DTC, BGO 3xC Performance Line: DTC, BGO 3xC Performance Line: DTC, BGO LAxA up to 160 pixels, 80/64 pin LAxA up to 160 pixels, 80/64 pin 3xD Standard Line: pin 3xD Standard Line: pin Mx Entry Line: 2-8KB; 14/20 pin Mx Entry Line: 2-8KB; 14/20 pin 3xM, 3xU plus 1.5% OCO, USB 3xM, 3xU plus 1.5% OCO, USB 3xD Standard Line 3xD Standard Line Mx Entry Line Mx Entry Line L3xM plus 1.5% OCO L3xM plus 1.5% OCO LAxA plus 52/32 pin LAxA plus 52/32 pin 3xT plus 28/36 ch 3xT plus 28/36 ch 3xW, 3xG Automotive: plus 20/32 pin 3xW, 3xG Automotive: plus 20/32 pin Category 14 to 80 pins 2 to 128 KB 32 to 100 pins 8 to 128 KB ApplicationSpecificFeatures CPU, Peripheral and Pin Compatible DTC: Data Transfer Controller BGO: Background Operation Data Flash

31 © 2010 Renesas Electronics America Inc. All rights reserved. 16 KB 24 KB 32 KB 64 KB 96 KB 128 KB 32LQFP40QFN R5F2136AT R5F2136CT 64LQFP R5F2138AT R5F2138CT 80LQFP R5F21334T R5F21335T R5F21336T R8C Capacitive Touch MCU Line-up R5F213J4T R5F213J5T R5F213J6T R8C/33T R8C/36T *R8C/38T * 18-Ch SCU 22-Ch SCU R8C/3JT 28-Ch SCU R5F21368TR5F21388T 36-Ch SCU * Available in 2011

32 © 2010 Renesas Electronics America Inc. All rights reserved. R8C CPU Core INTBL PC 0 20 ISP FLG SB USP 0 15 Hardware Multiplier R0HR0L R1HR1L R2 R0HR0L R1HR1L R2 R3 FB A0 A1 FB 0 15 Up to 1MB addressable Memory Space Fast 16-bit Multiplication Two Stack Pointer Registers Static Base Configure/Status 32-bit Configuration R0HR0L R1HR1L R2 R3 FB A0 A1 15 R0HR0L R1HR1L R2 R3 A0 A1 FB 0 15 SWITCH Dual Register Banks Relocatable Interrupt Vector Table R2 R3 B0 B1 Address Data Frame Base 0 R8C CPU Core

33 © 2010 Renesas Electronics America Inc. All rights reserved. Extensive Scalability Diverse Package Types and sizes (from 4mmx4mm to 16mmx16mm)

34 © 2010 Renesas Electronics America Inc. All rights reserved. 34  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration Ultra Low Power Key Attributes Non-LCD, Segment LCD 10 to 144 pins, small 3x3mm package 1KB to 512 KB Flash, Data Flash 10 to 144 pins, small 3x3mm package 1KB to 512 KB Flash, Data Flash 1.65 V to 5.5V (w/ADC) 1.65 V to 5.5V (w/ADC) Lowest Power 190uA (active), 0.3uA Standby Lowest Power 190uA (active), 0.3uA Standby ASSPs for Meter, Lighting, FA, RF ASSPs for Meter, Lighting, FA, RF Internal POR, LVD, Watchdog Internal POR, LVD, Watchdog Safety Features IEC60730 support Safety Features IEC60730 support 78K: Lowest Power Solutions for Battery Operated Applications  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch General Purpose Embedded Security  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security

35 © 2010 Renesas Electronics America Inc. All rights reserved. 78K Family Roadmap Now2011~ Kx1+ 10~20pin, 1~8KB ASSPs Lighting, Meter, FA etc. Fx3 30~100pin, 24~256KB ASSPs Dashboard etc. Low Pin Count GP Industrial ASSP Ultra Low power Auto GP Auto ASSP 150/350nm eFlash Kx2(-L) 20~80pin, 4~128KB 0.2mA/MHz, 0.3uA Kx3(-L) 44~144pin, 16~512KB 0.2mA/MHz, 0.3uA GP ASSPs HDMI/CEC, RF4CE etc. Consumer ASSP 130nm eFlash * Typ at 32MHz Lx3 Seg LCDC/D LCD Lower Power & Higher Scalability 20~128pin, 4~512KB 70uA/MHz*, 0.3uA Standby K0R-Next Next CAN Next ASSP Next LCD Next LPC Next ASSP

36 © 2010 Renesas Electronics America Inc. All rights reserved. ES CS 78K0R only PC SP Bank 3 Bank 2 Bank 1 Bank 0 MUL/DIV. System Bus Interface Address Bus Addr./ Data Bus Control Signals PSW ALU Bit Interrupt Controller 16-Bit Barrel Shifter 78K CPU Core Special Compiler Support Context Switching for Fast Interrupt Response Register Banks 0-3: 16-bit (Register Pair) 16x16 MUL (1 cycle) N=1 to 15 (1 cycle) 78K0, 78K0R only Internal Buses

37 © 2010 Renesas Electronics America Inc. All rights reserved. 78K: Best in Class Low Power Feature * Target Competitors (Device A) (Device B) 78K0/KX2-L 1.4mA 78K0R/KX3-L 2.4mA 78K0R-Next 1.3mA 3mA 1.32mA 78K0R-Next 0.52uA* Competitors (Device A) (Device B) 1.6uA 1uA 78K0/KX2-L 1.13uA 78K0R/KX3-L 0.9uA 8MHz OCO mA 32KHz RTC uA

38 © 2010 Renesas Electronics America Inc. All rights reserved. 38 R-Secure: Embedded Security Solutions Embedded Security  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security Key Attributes Near Field Communication for mobile phone Up to 32MHz Random Number Generator Up to 32MHz Random Number Generator Temper Proof Logical and Physical function Machine to Machine Authentication Crypto Algorithm Support Contact & Contact-less Smart card Highly reliable secure NV memory for application and data  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration Ultra Low Power  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch General Purpose

39 © 2010 Renesas Electronics America Inc. All rights reserved. M to M Authentication Embedded interface (I2C) Small package N Series * Under development NFC NFC Series* Renesas in the Secure MCU market Contact Smart Card AE4 Series AE5 Series RS4 Series Banking, ID card Contactless Smart Card AE41R RS4X Series* Banking card Mobile Phone Embedded

40 © 2010 Renesas Electronics America Inc. All rights reserved. 40 Microcontroller and Microprocessor Line-up Superscalar, MMU, Multimedia  Up to 1200 DMIPS, 45, 65 & 90nm process  Video and audio processing on Linux  Server, Industrial & Automotive  Legacy Cores  Next-generation migration to RX High Performance CPU, FPU, DSC Embedded Security  Up to 25 DMIPS, 180, 90nm process  1mA/MHz, 100uA standby  Crypto engine, Hardware security  Up to 165 DMIPS, 90nm process  500uA/MHz, 2.5 uA standby  Ethernet, CAN, USB, Motor Control, TFT Display  Up to 500 DMIPS, 150 & 90nm process  600uA/MHz, 1.5 uA standby  Medical, Automotive & Industrial High Performance CPU, Low Power  Up to 25 DMIPS, 150nm process  190 uA/MHz, 0.3uA standby  Application-specific integration Ultra Low Power  Up to 10 DMIPS, 130nm process  350 uA/MHz, 1uA standby  Capacitive touch General Purpose

41 © 2010 Renesas Electronics America Inc. All rights reserved. Questions?

42 © 2010 Renesas Electronics America Inc. All rights reserved. 42 © 2010 Renesas Electronics America Inc. All rights reserved. Innovations and Ubiquitous Computing

© 2010 Renesas Electronics America Inc. All rights reserved. 43 Thank You!

Renesas Electronics America Inc.