-1- Statistical Analysis and Modeling for Error Composition in Approximate Computation Circuits Wei-Ting Jonas Chan 1, Andrew B. Kahng 1, Seokhyeong Kang 1, Rakesh Kumar 2, and John Sartori 3 1 VLSI CAD LABORATORY, UC San Diego 2 PASSAT GROUP, Univ. of Illinois 3 Univ. of Minnesota

-2- Threats to traditional IC design approach... Threats to traditional IC design approach... Extreme variations / Reliability issues / Cost: Approximate Computation: Approximate Computation: Relaxing the requirement of correctness can dramatically reduce costs of the design Why Approximate Computation? Threats to traditional IC design approach... Threats to traditional IC design approach... Extreme variations: PVT variation uncertainty leads to design overhead Reliability issues: Hard errors (NBTI, latchup), Soft errors (α-particle) Cost: Cost (power/performance) of perfect accuracy is too high! Approximate Computation Approximate Computation Relaxing the requirement of correctness can dramatically reduce costs of the design What is the square root of 10 ? “a little more than three” “ ” Approximation could be faster and more powerful

-3- Reduce Design Cost with Approximations Simplified critical paths but with errors Accurate hardware Approximate hardware Approach: insert approximate hardware modules on critical paths What is the output quality of this circuit?

-4- Building Blocks: Approximate Hardware Modules Zhu et al. TVLSI 2010  ETAI : accurate part + inaccurate part  Reduce error size  Error rate is high  ETAIIM : limited carry-chain run-length  Extra protection hardware  Reduce error rate and significance

-5- (c)~(f) have 50% power of accurate adder (b), BUT…… Result Quality Estimation of Approximate Computation Image smoothing (Addition operations executed by different approximate adders) (a)Original image (b)Accurate adder (c)ACA (d)ETAI (e)ETAII (f)LU (a)(b)(c) (d)(e)(f) How can system designers estimate result quality metrics for circuits containing approximate adders?

-6- Problem: Result Quality Estimation Correct results Approximate results Arithmetic hardware replacement Accurate hardware Approximate hardware Given: Input statistical properties Hardware configurations Topologies of circuits Output: Estimated error metrics Goal: quantify degradation of result accuracy after approximate hardware modules are inserted How to compose errors at circuit level? Solution from this work:

-7- Outline Related Work Related Work Problem Modeling and Proposed Approaches Problem Modeling and Proposed Approaches Results and Conclusions Results and Conclusions

-8- Related Work [HuangLR12]  Propagates error metrics  Improves estimation accuracy and runtime Our work CategoryGate levelRounding Approximate Arithmetic VDD scaling Manipulated Elements Logic cellArithmetic Multiple Levels Error SourceAppx. HWRoundingAppx. HWOver-scaled V DD Probabilistic Errors NNNY  Intensively characterize error distributions over different intervals  Propagate distributions with interval arithmetic

-9- Related Work [HuangLR12]  Intensively characterize error distributions over different intervals  Single intervals represent multiple values in log scale  quantization inaccuracy Positive Errors Negative Errors abs(log(Probability)) PDF PMF If the inputs are out of range, there will be extra inaccuracy

-10- Related Work [HuangLR12] Source of estimation inaccuracy: quantization errors from interval representation Source of estimation inaccuracy: quantization errors from interval representation Accuracy does not scale with characterization runtime Accuracy does not scale with characterization runtime For better accuracy, alternative approach is required

-11- Error Metrics for Quality Estimation Error rate (ER): measures the frequency of error occurrences Error significance (ES): measures the magnitude of errors Average relative error significance (ARES): measures the ratio between error magnitude and signal magnitude Mean square error (MSE): common metric in signal processing Signal to Noise Ratio (SNR): common metric for quality of image processing Max error (MAXE): measure the upper bound of errors

-12- Outline Related Work Related Work Problem Modeling and Proposed Approaches Problem Modeling and Proposed Approaches Results and Conclusions Results and Conclusions

-13- Our Quality Estimation Approach Traverse the design to propagate statistical property Look up EM in in pre-characterized library Compute EM at output by propagations Pre-characterized STD tables Pre-characterized EM in tables Stage 1: Hardware characterization Stage 2: Composition of EMs Statistical property Information of EMs STD: standard deviation EM in : intrinsic error metric

-14- Our Quality Estimation Approach Traverse the design to propagate statistical property Look up EM in in pre-characterized library Compute EM at output by propagations Pre-characterized STD tables Pre-characterized EM in tables Stage 1: Hardware characterization Stage 2: Composition of EMs Statistical property Information of EMs

-15- Hardware Characterization: Observation #1 Observation #1: EMs of approximate hardware depend on input patterns Observation #1: EMs of approximate hardware depend on input patterns Input patterns decide whether carry chain will lose bits ETAIIM CLA RCA CLA RCA CLA RCA CLA RCA ‘0’ k guard blocks for MSB MSB {A, B} EM in = f( k, STD A, STD B )

-16- Hardware Characterization: Observation #2 Observation #2: EMs in ETAIIM-type adders depend on input distribution and hardware configuration Observation #2: EMs in ETAIIM-type adders depend on input distribution and hardware configuration k = # of guard blocks to mitigate errors Log(ES) vs. input STDs ER vs. input STDs k = 1 k = 2 k = 3 k = 4

-17- Hardware Characterization: Our Solution Generate lookup tables to store pre-characterized EMs Generate lookup tables to store pre-characterized EMs Generate libraries STD Z tables STD A STD B Hardware configurations EM in tables STD A STD B Hardware configurations EMs vs. input STDs

-18- Our Quality Estimation Approach Traverse the design to propagate statistical property Look up EM in in pre-characterized library Compute EM at output by propagations Pre-characterized STD tables Pre-characterized EM in tables Stage 1: Hardware characterization Stage 2: Composition of EMs Statistical property Information of EMs

-19- Composition of EMs: Error Propagation EM in : EM generated by approximate hardware {STD {A,B}, EM {A,B} }: propagated standard deviations / EMs from previous stages {EM Z, STD Z }: EMs and STDs at output nodes {STD A, EM A } {STD B, EM B } {STD z, EM Z } EM in +*+* +*+* +*+* +*: approximate adders Key issue: enable error propagation in circuit topology

-20- Composition of EMs: Observation Observation: EM (e.g., rate, magnitude) at a node depends on both intrinsic and propagated EMs Observation: EM (e.g., rate, magnitude) at a node depends on both intrinsic and propagated EMs ER A ER B ER Z ER in +*+* +*+* +*+* ES A ES B ES Z ES in +*+* +*+* +*+* ES Z = ES in + ES A + ES B (assume no cancellations between all error sources) Pass Rate ER Z = 1-(1-ER in )⋅(1-ER A )⋅(1-ER B )

-21- Composition of EMs: Our Method Our method: Our method: –Traverse the circuit and propagate STDs in its topology –EMs are looked up in the pre-characterized libraries A B C D E F Function = ((A+B)+(C+D))+(E+F) ER Z = 1−(1−ER in ) · (1−ER A ) · (1−ER B ) EM Z = EM in + EM A + EM B For each node, EMs are propagated as follows: Traverse and propagate (for EMs other than ER)

-22- Outline Related Work Related Work Problem Modeling and Proposed Approaches Problem Modeling and Proposed Approaches Results and Conclusions Results and Conclusions

-23- Results: Table-Lookup Approach Testcase: 5-node adder tree Input distributions: zero mean normal distribution with different STDs Different configurations of ETAIIMs Compared with Monte Carlo simulation

-24- Experimental Results: FIR Filter NET11 NET1 C1 = 0.1 NET2 C2 = 0.2 NET3 C3 = 0.3 NET4 C4 = 0.4 NET10 NET9 NET5NET6 NET7 NET8 NetTypeError Estimation Inaccuracy (%) ERESARESMSESNRMAXE NET9ETAIIMIN0.3%6.4%17.0%6.4%19.1%0.0% NET10ETAIIMIN1.3%2.6%61.9%3.3%10.7%0.0% NET11ETAIIMIN1.0%6.3%419.6%6.2%6.1%0.0% NET11ETAIIMP13.4%5.8%692.3%5.8%436.4%0.7% Approximate FIR  Adders are approximate  Multipliers are accurate Approximate FIR  Adders are approximate  Multipliers are accurate Estimation inaccuracies at each node for different error metrics Estimation inaccuracies at each node for different error metrics

-25- Experimental Results: MAC C0C0 A0A0 A1A1 level 1 C1C1 CiCi AiAi level i Output... Approximate MAC (multiply-accumulate)  Adders are approximate  Multipliers are accurate  14 levels of MAC are tested  20 testcases for each #level

-26- MAC: Comparison with HuangLR12 [HuangLR12] Relative inaccuracy = 10 9 beyond the lower bound of characterization ES ER Our method interpolates continuously changing EM in lookup table

-27- MAC: Speedup and Accuracy Improvement Speedup= 8.4x Accuracy improvement = 3.75x Faster runtime  allows designer to evaluate more design combinations Better accuracy  reduce the iterations due to mis-prediction

-28- Conclusions We propose an approach for output quality estimation of approximate designs We propose an approach for output quality estimation of approximate designs Our approach achieves 8.4× runtime improvement for error composition and 3.75× average accuracy improvement for ES compared to previous (DAC-2012) work of Huang et al. Our approach achieves 8.4× runtime improvement for error composition and 3.75× average accuracy improvement for ES compared to previous (DAC-2012) work of Huang et al. We demonstrate results on FIR filter and MAC circuits with up to 30 nodes We demonstrate results on FIR filter and MAC circuits with up to 30 nodes

-29- Future Work Improve accuracy of EM estimation for relative error metrics (e.g., ARES and SNR) Improve accuracy of EM estimation for relative error metrics (e.g., ARES and SNR) Extend our approach to other approximate modules, including multipliers Extend our approach to other approximate modules, including multipliers Develop a synthesis flow for approximate circuits using our EM analysis approach Develop a synthesis flow for approximate circuits using our EM analysis approach Generalize our approach to arbitrary input distributions Generalize our approach to arbitrary input distributions

-30- Thank You!

-31- Backup Slides

-32- Experiment and Results Approximate circuit: Random-generated circuits  Netlists are randomly generated with accurate multipliers and different ETAIIM approximate adders

-33- Regression study of EM Composition We also tried to generalize our propagation model with parameter regression We also tried to generalize our propagation model with parameter regression General form of error propagation models: General form of error propagation models: Simulated EM results from different hardware configurations and input distributions/EMs are used for regression Simulated EM results from different hardware configurations and input distributions/EMs are used for regression Parameters in the models are fitted with simulation data Parameters in the models are fitted with simulation data

-34- Regression study of EM Composition Results of parameter regression Results of parameter regression Regression Parameters ERESARESMSESNRMAXE 1.03E E E E E E E E E E E E E E E E E E-05 Estimation Inaccuracy w/o Reg. 4.15E E E E E E-01 with Reg. 7.40E E E E E E+01

-35- Experimental Results: FIR Filter Approximate FIR  Adders are approximate  Multipliers are accurate Approximate FIR  Adders are approximate  Multipliers are accurate Estimation inaccuracies at each node for different error metrics Estimation inaccuracies at each node for different error metrics NET11 NET1 C1 = 0.1 NET2 C2 = 0.2 NET3 C3 = 0.3 NET4 C4 = 0.4 NET10 NET9 NET5NET6 NET7 NET8 NetTypeError Estimation Inaccuracy (%) ERESARESMSESNRMAXE NET9ETAIIMIN0.3%6.4%17.0%6.4%19.1%0.0% NET10ETAIIMIN1.3%2.6%61.9%3.3%10.7%0.0% NET11ETAIIMIN1.0%6.3%419.6%6.2%6.1%0.0% NET11ETAIIMP13.4%5.8%692.3%5.8%436.4%0.7%