CMOS Logic.  The CMOS Logic uses a combination of p-type and n-type Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) to implement logic gates.

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Presentation transcript:

CMOS Logic

 The CMOS Logic uses a combination of p-type and n-type Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) to implement logic gates and other digital circuits found in computers, telecommunications and signal processing equipment. Introduction

CMOS Logic

 The two MOSFETs are designed to have matching characteristics.  When off, their resistance is effectively infinite; when on, their channel resistance is about 200 Ω. Introduction

 CMOS gates are all based on the fundamental inverter circuit.  Note that both transistors are enhancement-mode MOSFETs; one N-channel with its source grounded, and one P-channel with its source connected to +V.  Their gates are connected together to form the input, and their drains are connected together to form the output. CMOS gates

CMOS NOT gate

 When input A is grounded (logic 0), the N-channel MOSFET is unbiased, and therefore has no channel enhanced within itself.  It is an open circuit, and therefore leaves the output line disconnected from ground.  At the same time, the P-channel MOSFET is forward biased, so it has a channel enhanced within itself. CMOS NOT gate

CMOS NOR gate

 In this circuit, if both inputs are low, both P-channel MOSFETs will be turned on, thus providing a connection to +V.  Both N-channel MOSFETs will be off, so there will be no ground connection.  However, if either input goes high, that P-channel MOSFET will turn off and disconnect the output from +V, while that N- channel MOSFET will turn on, thus grounding the output. CMOS NOR gate

CMOS NAND gate

 The structure can be inverted.  Here we have a two-input NAND gate, where a logic 0 at either input will force the output to logic 1, but it takes both inputs at logic 1 to allow the output to go to logic 0. CMOS NAND gate

CMOS B NAND gate

 The technique here is to follow the actual NAND gate with a pair of inverters.  Thus, the output will always be driven by a single transistor, either P-channel or N-channel.  Since they are as closely matched as possible, the output resistance of the gate will always be the same, and signal behaviour is therefore more predictable. CMOS B NAND gate

Bilateral switch

 One type of gate is unique to CMOS technology.  This is the bilateral switch, or transmission gate.  It makes full use of the fact that the individual FETs in a CMOS IC are constructed to be symmetrical. Bilateral switch

 hookey.com/digital/electronics/cmos_gates.html hookey.com/digital/electronics/cmos_gates.html  See more

…….. Thank You …….. The End