06/02/02CERN - LARG meeting1 CALIBRATION BOARD STATUS Status of the DMILL chips used on the calib. boards Low Offset Op Amps: Offset measurements Schedule for the fabrication of 2 calib boards (128 channels)
06/02/02CERN - LARG meeting2 DMILL CHIPS STATUS (For 2 « 128 channels » calib boards) Low Offset Op. Amps: 130/board with a few uV offset after compensation: 364 available with initial offsets< ± 200 uV Calogic: Need of 12 for 2 boards: 40 chips in PQFP100 available 16 bits DAC, Spac Slave V3: 1/board. Expected in the last DMILL run which was unsucessfull. Only one wafer correct. Ceramic packaging (Week 7) of a few samples to test them as soon as possible TTC Rx: 1/ board Delay chips: 2/board
06/02/02CERN - LARG meeting3 OP. AMP: OFFSET before compensation Reception of 593 Op. Amps 19 OA out of working or with offset >10 mV Cuts ± 150 uV: 309/574= 53.8 % Cuts ± 200 uV: 364/574= 63.4 % Selection of OA with initial offset < 200 ± uV to be compensated to a few uV:
06/02/02CERN - LARG meeting4 CALIB 128: SCHEDULE (1) 8 channels prototype with DMILL analog and digital chips, before two « 128 channels calib boards »: Printed Board: - Design ready the 18th of February (Week 8) Fabrication of 3 printed boards: - 2 weeks (Week 10) Soldering: - 1 week => 3 eight channels prototypes ready for test mid of March (Week 11).
06/02/02CERN - LARG meeting5 CALIB 128: SCHEDULE (2) 2 « 128 channels » calibration boards: Design of the printed board as soon as the layout of the 8 channels prototype is finished End of March (Week 14): Layout finished and all the files (layout, list of materials) ready for the call for tenders As 52 days are mandatory after the call for tenders, the fabrication can ’t begin before the mid of june. 2 boards ready for test in september