TCSP Presentation #3 Team 14 SPOT DASH. Schematics 3 Pages 3 Pages Page 1: Buttons, LEDs, sensors related circuits Page 1: Buttons, LEDs, sensors related.

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Presentation transcript:

TCSP Presentation #3 Team 14 SPOT DASH

Schematics 3 Pages 3 Pages Page 1: Buttons, LEDs, sensors related circuits Page 1: Buttons, LEDs, sensors related circuits Page 2: Microcontroller related circuits Page 2: Microcontroller related circuits Page 3: DC-DC, CAN Bus, RS232 related circuits Page 3: DC-DC, CAN Bus, RS232 related circuits

Buzzer Photocell Tmp Sensor Button Interface LEDs Optical Isolation for buttons

Schematics 3 Pages 3 Pages Page 1: Buttons, LEDs, sensors related circuits Page 1: Buttons, LEDs, sensors related circuits Page 2: Microcontroller related circuits Page 2: Microcontroller related circuits Page 3: DC-DC, CAN Bus, RS232 related circuits Page 3: DC-DC, CAN Bus, RS232 related circuits

Microcontroller Clock Generator Debug Headers for Micros PLD Bypass Caps

Schematics 3 Pages 3 Pages Page 1: Buttons, LEDs, sensors related circuits Page 1: Buttons, LEDs, sensors related circuits Page 2: Microcontroller related circuits Page 2: Microcontroller related circuits Page 3: DC-DC, CAN Bus, RS232 related circuits Page 3: DC-DC, CAN Bus, RS232 related circuits

DC-DC Converter CAN Bus Transceiver Transceiver RS232 Driver/Receiver Bypass Caps Mounting Holes

Schematic Design Consideration Schematic support I2C and SPI. Schematic support I2C and SPI. Hardware configurable Hardware configurable Optical isolation for remote buttons Optical isolation for remote buttons Cable detection Cable detection

PCB 2 Pages 2 Pages Page 1: Top Layer with Unrouted traces Page 1: Top Layer with Unrouted traces Page 2: Bottom Layer with Unrouted traces Page 2: Bottom Layer with Unrouted traces

PCB 2 Pages 2 Pages Page 1: Top Layer with Unrouted traces Page 1: Top Layer with Unrouted traces Page 2: Bottom Layer with Unrouted traces Page 2: Bottom Layer with Unrouted traces

PCB Design Consideration Space Constraint 4.5” x 2.75” board Space Constraint 4.5” x 2.75” board Placement for Crystal and MTE connector Placement for Crystal and MTE connector Active component on top layer, passive components on bottom layer Active component on top layer, passive components on bottom layer Power and GND trace need to be 40 mils Power and GND trace need to be 40 mils Allowing more current flow. Allowing more current flow. Bypass capacitors need to be close to the component. Bypass capacitors need to be close to the component.

Bypass capacitors help balance out the inductance inside the traces. Bypass capacitors help balance out the inductance inside the traces. Grouping different parts into functional blocks Grouping different parts into functional blocks Connecting Power and GND traces before the signals. Connecting Power and GND traces before the signals. PCB Design Consideration