Digital Control Systems Digital Control Design via Continuous Design Emulación F,P&W Chapters 6 & 7.2

 Part A: Introduction & Design Procedure  Part B: Discrete Equivalents to Continuous Transfer Functions  Part C: Antenna Design Example

Digital Control Design via Continuous Design - Part A : Introduction & Design by Emulation Procedure

Introduction  Continuous control methods may be applied to digital controller design.  This section presents a digital design method based on analog compensators.  Additional knowledge is needed of how to convert the continuous compensator to a digital filter while retaining adequate fidelity.

Introduction (continued)‏  The effects of the D/A and A/D conversion processes must be accounted for.  A suitable sample period must be selected.  The “equivalent” discrete controller will not be match the exact behavior of the continuous controller.

Introduction (concluded)‏  This design methodology, called the “approximation” or “emulation” method, requires a high sampling rate to be effective.  This method is highly practical and the design of a digital controller usually starts with an analog design, if only to select a suitable sample period.

Design Procedure  Start with continuous design  Add sampled-data system elements  Choose sample period  Digitize control law  Check performance using discrete model or simulation (Simulink)‏

22/09/09EE W.J. Murphy 8 Start with a continuous design Plant Compensator + _ Compensator, D(s), may be given as an existing design which is to be implemented digitally (product upgrade) or We may choose D(s) using root locus or Bode design techniques to meet specified performance criteria.

22/09/09EE W.J. Murphy 9 Add elements necessary for digital control + _ Transform D(s) to D(z) so that we obtain the discretely controlled system shown which will behave as similar as possible to the continuous system. Include: a D/A converter, usually a zero-order-hold device; an A/D converter, modeled as an ideal sampler; and an antialiasing filter, a low-pass, unity gain filter with a sharp cutoff frequency of ws/2.

22/09/09EE W.J. Murphy 10 Design Procedure: Step #1 Choose a sample frequency, w s, based on the closed- loop bandwidth of the continuous system. Because of the approximate nature of this design method, it is best to choose. Then, and the passband of the antialiasing filter, w p, is For a first-order antialiasing filter, this means

22/09/09EE W.J. Murphy 11 Design Procedure: Step #2 Check behavior of continuous design when the DAC and antialiasing filter are inserted. For a ZOH, the following are useful: Generally, the antialiasing filter has little effect. If necessary increase w s or adjust D(s) to obtain nearly the same performance as the continuous design.

22/09/09EE W.J. Murphy 12 Design Procedure: Step #3, #4 Step #3: Digitize control law (See next section)‏ Step #4: Check behavior of sampled-data system by analysis of discrete model. If we ignore the dynamics of the antialiasing filter the discrete model is + _ where for a zero-order hold.

22/09/09EE W.J. Murphy 13 So, Compute closed-loop poles and zeros. Obtain transient response data. Obtain frequency response data, particularly the gain and phase margins which indicate the ability of the design to withstand uncertainty or variation in the plant dynamics (robust design). If we include the antialiasing filter, then Usually we can ignore the effect of the antialiasing filter because its bandwidth, ws/2, is much larger than that of the closed-loop system. Step #4 (continued): Analyze discrete closed-loop model

22/09/09EE W.J. Murphy 14 Design Procedure: Step #5 Convert D(z) to a numerical algorithm by converting into a difference equation which can then be written in appropriate code.

22/09/09EE W.J. Murphy 15 Example: Design by emulation Problem: Consider the continuous system shown below which utilizes proportional (gain) compensation. Plant Compensator Note: In this case steps 3 and 5 are trivial since _ +

22/09/09EE W.J. Murphy 16 Example Design Procedure: Step#1 The open-loop and closed-loop frequency responses are given on next two slides. From the closed-loop frequency response we find the closed- loop bandwidth to be approximately 12.5 rad/sec. Yielding a sampling frequency of: We choose the faster sampling rate, The passband of the antialiasing filter is therefore which for a first-order filter yields

22/09/09EE W.J. Murphy 17 From slide redesigned Phase Margin of 34 Example: Step#1(continued)‏ Open-loop frequency response

22/09/09EE W.J. Murphy 18 Example: Step#1 (concluded)‏ Closed-loop frequency response

22/09/09EE W.J. Murphy 19 Since the break frequency of the antialiasing filter is greater than one decade above the open-loop gain crossover frequency (phase margin frequency) of 8 rad/sec (see slide 16) the antialiasing filter will lower the phase margin by atan(8/125) = 4 degrees. The ZOH will cause an additional negative phase shift of w*pi/180 but will not affect gain crossover (since its gain is 1). Its effect on open-loop phase angle is shown on the next slide. The phase margin is reduced from 24 o without the hold to 18 o with the hold. The gain margin has been reduced from infinite without the hold to 12.5 dB (4.22) with the hold. Example Design Procedure: Step#2

22/09/09EE W.J. Murphy 20 Effect of ZOH on open-loop phase angle as a function of frequency

22/09/09EE W.J. Murphy 21 Example Design Procedure: Step#2 (continued)‏ 6 o +4 o =10 o of phase margin has been lost. To regain the lost 10 o, lower the open-loop gain. From the open-loop frequency response (slide 16), the gain crossover frequency needed for a phase margin of 24 o +10 o is approximately 5.5 rad/sec. This requires the gain to be reduced by about 6dB (2). So, the adjusted gain is 70/2=35. This lowers the closed-loop bandwidth, so we could recompute the new bandwidth and lower w s it further refinement is desired. We will proceed with the design procedure recognizing that the digital mechanization will have lower bandwidth, a lower gain margin and about the same phase margin as the continuous system.

22/09/09EE W.J. Murphy 22 Step #3: Digitize control law D(z)=35 => u i =35 e fi Step #4: Analyze discrete model Example Design Procedure: Step#3, #4

22/09/09EE W.J. Murphy 23 Example MATLAB analysis: Emulation_example.m script % DESIGN BY EMULATION EXAMPLE % CONTINUOUS SYSTEM plant_c=zpk([],[0,-3.5],1)‏ K_c=70 closed_loop_c=feedback(K_c*plant_c,1)‏ % DISCRETE SYSTEM MODEL Ts=0.025 plant_d=c2d(plant_c,Ts)‏ K_d=K_c/2 closed_loop_d=feedback(K_d*plant_d,1)‏ % STEP RESPONSE COMPARISON Time=0:0.025:199*0.025;figure(1)‏ yc=step(closed_loop_c,Time); yd=step(closed_loop_d,Time); plot(Time,yc,Time,yd),title('STEP RESPONSE COMPARISION'),legend('CONTINUOUS','SAMPLED-DATA')‏ % FREQUENCY RESPONSE COMPARISON [Gain_Margin_c,Phase_Margin_c]=margin(K_c*plant_c)‏ [Gain_Margin_d,Phase_Margin_d]=margin(K_d*plant_d)‏ Gain_Margin_c_dB=20*log10(Gain_Margin_c)‏ Gain_Margin_d_dB=20*log10(Gain_Margin_d)‏ figure(2),bode(closed_loop_c,'b',closed_loop_d,'r')‏ title('CLOSED-LOOP FREQUENCY RESPONSE COMPARISION'),legend('CONTINUOUS','SAMPLED-DATA')‏

22/09/09EE W.J. Murphy 24 Command window output for Emulation_example.m script » Zero/pole/gain: s (s+3.5)‏ K_c = 70 Zero/pole/gain: (s^ s + 70)‏ Ts = Zero/pole/gain: (z )‏ (z-1) (z )‏ Sampling time: K_d = 35 Zero/pole/gain: (z )‏ (z^ z )‏ Sampling time: Gain_Margin_c = Inf Phase_Margin_c = Gain_Margin_d = Phase_Margin_d = Gain_Margin_c_dB = Inf Gain_Margin_d_dB = Note: Gain margin is approximately equal to original margin of 12.5 plus 6 dB reduction in proportional gain.

22/09/09EE W.J. Murphy 25 Note: The original (continuous) system is quicker (higher bandwidth) and less damped (higher overshoot) than digital mechanization. Step response comparison

22/09/09EE W.J. Murphy 26 Closed-loop frequency response comparison Note: Wider closed-loop bandwidth of continuous mechanization, as predicted. Also, note slightly larger resonant peak (less damping)‏