Silicon 10% test status D0 Collaboration Meeting - Plenary meeting Marian Zdražil October 13, 2000

D0 Plenary meeting 10/13/002 Why the 10 % Test ? The Silicon Readout System constitutes a major challenge due to its: »Complexity : »Complexity : large number of different individual readout components which have to work together with an extreme accuracy to achieve a high data integrity. »Scope : PHASE 1 : testing and debugging of individual readout components ( from SVX chips to L3) PHASE 2 : setup of complete readout system to check data integrity and noise; exercise L3 software, online monitoring with EXAMINE, SDAQ,… PHASE 3 : readout of a full barrel+disk; exercise acquisition control; establish barrel/disk test station; cosmic test with this setup PHASE 4 : shake down after installation in the pit ßEnsure proper performance ßProvide adequate operating marging for the experimental device ßExercise acquisition control and software ßAddress large scale system problems ßEstablish barrel/disk test-station No surprises wanted !!! Have to make sure it works in DAB

D0 Plenary meeting 10/13/003 Silicon Readout Data Flow platform SEQSEQ SEQSEQ SEQSEQ SEQSEQ SEQSEQ SEQSEQ 3/6/8/9 Chip HDI Sensor 8’ Low Mass Cable ~19’-30’ High Mass Cable (3M/80 conductor) VRB Controller Optical Link 1Gb/s VBDVBD VRBVRB VRBVRB VRBVRB VRBVRB 68k/ Pwr PC Bit3 PC SDAQ (Silicon Graphics) L3MPM VME HV / LV Adapter Card I,V,T Monitoring KSU Interface Board 25’ High Mass Cable (3M/50 conductor) CLKs SEQ Controller Serial Command Link

D0 Plenary meeting 10/13/004 The 10% Test ýComplete readout system in final readout configuration installed in Lab C clean room at SiDet ýPotential to readout 10% of Silicon Tracker ( ~ 80,000 readout channels ) Adapter cards & low- mass cables KSU IB crate VRB crate Seq crate & G-link HV system & distribution panel L3 node

D0 Plenary meeting 10/13/005 Overall Status  Experience with FD14 ( July 31 - Aug 11 ) : valuable experience ! Cooling system operation continuous Device protection tools tested and understood ( cooling interlocks, KSU IB temperature and current trips ) Development/testing of software : DBGui download, 1553 monitoring ( Strip Tool ), SMT Examine Many small readout problems understood and fixed. Very stable readout system operation during two overnight runs  significant degree of data integrity achieved 17 HDIs into 3 IBs/Seqs/VRBs ( 8 FW6 + 9 FW8 = 120 chips ); data transfer rate to L3 : ~700 Hz, ~80 Mevents, ERROR FREE ( 15,360 channels readout, ~ bits tested )  Readout tests with BA1 ( Aug 30 - Sept 18 ) : Cabling/testing procedures exercised and understood ( long & painful ) Discovered short of PriGuard to GND at the KSU IB  surgical work on every low-mass cable ! ( pin lifted in the Hirosi connector; these cables do not go to the experiment and problem was solved for the final version of adapter card ) Data integrity runs very successful - 4 overnight runs 57 ladders into 9 Ibs/Seqs/VRBs ( 30 L L3 = 351 chips ); data transfer rate to L3 : ~250 Hz, ~42 Mevents, ERROR FREE ( 44,928 channels, ~3 x bits tested )

D0 Plenary meeting 10/13/006 Overall Status ( cont’d ) Readout tests with BA4  Readout tests with BA4 ( Sept 26 - now ) : Discovered minor problems ( CalInject = Seq problem ); hook up and check out went smoothly ( all channels were already tested at BA1 ! ) Data integrity runs successful - 3 overnight runs 57 ladders into 9 Ibs/Seqs/VRBs ( 31 L L6 = 471 chips ); data transfer rate to L3 : ~200 Hz Readout of 60,288 channels ERROR FREE at 23.6 Mbyte/s !! ( whole calorimeter is 55k ! ) Combined readout tests with BA4 + FD6  Combined readout tests with BA4 + FD6 ( Sept 26 - now ) : Discovered minor problems ( CalInject, HV PS module problems ) while connecting FD6; hook up and check out went smoothly ( using 24 low-mass cables from the experiment - extreme care has to be taken ) Data integrity runs - this weekend BA4 : 57 ladders into 9 IBs/Seqs/VRBs ( 31 L L6 = 471 chips ) FD6 : 24 F-wedges into 3 IBs/Seqs/VRBs ( 12 L L6 = 168 chips ) Future : â Future : readout tests with H-disk, if time permits cosmic tests BA4 + FD6,

Barrel installed in dry box HDI connection to low-mass cable

D0 Plenary meeting 10/13/008 Hardware Configuration Readout Elements : Most of the Hardware is production version. Exceptions : KSU IBs - kludges ( e.g. CLK compensation circuit, DVALID deglitching circuit,…) and adapter cards ( fix for PriGuard shorted to GND ) Cannot readout more than 60 ladders due to the lack of low-mass cables, Seq back-plane problems, etc. Barrel readout requires only 9 KSU IBs/Seqs/VRBs  at D0 we will have 9 VRBs in a crate. However in the 10% Test are placed 12 VRBs required for barrel + F-disk readout in one crate. HV System : total of 168 pods => ability to apply “split bias” individually to every ladder in a barrel + F-disk ( at D0 : share HV pod among 4 ladders !! ) Interlock System and Trips : Cooling System Interlocks : implemented trips based on coolant temperature, flow through bulkhead  trips power for entire KSU IB crate humidity inside box  trips chiller KSU IB trips : SVX power tripped off if I > 750 mA or T RTD > 40 °C ( trips occur on HDI-by-HDI basis ) HV System trips : HV tripped off if V > 100 V or I > 50  A ( large current transients during ramp up reaching 30  A ! )

D0 Plenary meeting 10/13/009 Software Tools Detector Readout Crate Controls Crate UNIX Hosts Control Room PCs EPICS Clients: SVX Download Low Voltage High Voltage 1553 Devices Rack Monitor EPICS Clients: SVX Download Low Voltage High Voltage 1553 Devices Rack Monitor Controls Ethernet ORACLE Hardware Database EPICS DB Generator 1553 UNIX Hosts Control Room PCs Data Cable L3 Supervisor L3 VRC L3 Filter Data Cable NT Level 3 Ethernet Examine Collector / Router Data Logger Data Logger Disk Data Distributor Data Distributor Download : download of SVXs, Seqs, VRBs and VBD from the hardware DB ( DBGui or spreadsheet ) KSU IB Monitoring : 1553 monitoring of I, V, T and Status in KSU IB. Strip charts. HV Control and Monitoring Alarms : issue alarms before a trip condition occurs SMT Examine : Online and offline data monitoring/analysis PDAQ : Raw data packed in the SiDet L3 node running Script runner and sent to the online host where it is written to disk and tape. Also exercised unpacker and cluster tool. SDAQ : Calibration run at the FE processor ( PwrPC ) computing average pedestal, sigma and gain per channel. Calibration data loaded into Calibration DB, chip threshold computed and SVX chip downloaded for sparse readout. Not exercised with BA1 but it should be exercised with BA4 !

D0 Plenary meeting 10/13/0010 Turn-on procedures â Whole readout chain mapped out and tested before barrel installation ( 1553 monitoring of I, V and T, download and readout, HV distribution and trips, KSU IB trips â Proper functionality of cooling system interlocks verified â Every ladder is connected at a time. Functionality test performed : take pedestal and CalInject events with/without silicon biasing ( HV ramped up at 2 V/sec, in steps of 30%, 60% and 100% ). No cooling needed for this operation ! â Simultaneous turn-on of more than 1 ladder requires cooling : â Box containing the barrel kept closed and dry ( dual system of dry air and N2 )  typically dew point inside the box ~ -10 °F â Operating point : T coolant = 50 °F  T RTD ~ °C Stable operation of cooling system

D0 Plenary meeting 10/13/0011 Preliminary Results Data Integrity tests : á Long runs in checksum mode for full device á Data fixed to a known value ( 0x14 ) and shipped to the L3 node, where every bit is checked. The aim is to discover any readout problems associated with a large system : cross-talk, marginal timing issues due to the spread in the system, etc. á Only summary files specifying the errors are written to disk at the end of the run á Low-mass cables in 3 bundles tightly stacked for ~50-60 cm run without foam  try to maximize cable-to-cable cross-talk. No effects observed ! á Very stable DAQ - halted only a few times by L3 node ( to be understood yet ) á Data transfer rate  250 Hz, depending on the number of devices read out 57 ladders  91.4 kbytes  transfer rate to L3 ~ 22.7 Mbytes/sec á Total number of events read in for BA1 : ~42M  3 x bits ERROR FREE á These tests have been successfully carried out for all Det Configuration by now ! # Ladders Det Configuration 9-chip 8-chip 6-chip 3-chip Total Total # of chips Total # of readoutCHN FD ,360 BA ,928 BA ,288 BA4 + FD ,328

D0 Plenary meeting 10/13/0012 Preliminary Results ( cont’d ) Noise studies : á Short runs ( ~ 1k-10k events ) performed during a daytime. á Data monitoring with Online Examine and written to disk for offline analysis. á Data taken in different conditions : HV on/off for all/some bundles, different Preamp Bandwidth settings, etc. ñ Very good noise characteristics : total noise  2 ADC counts for reasonable SVX settings ñ Almost ideal Gaussian pedestal distribution for chips without noisy channels. Tails understood whenever present. ñ Didn’t run in sparse mode ( didn’t exercise SDAQ ) but can “simulate” it with SMT Examine and study occupancy.

D0 Plenary meeting 10/13/0013 Temperature monitoring of BA4 Ladders temperature spread for both cooling channels Powered/Unpowered ladder temperature distribution for BA4

D0 Plenary meeting 10/13/0014 Summary and Plans ã Exercised barrel cabling, device protection measures ( interlocks and monitoring ) and full data acquisition with almost final readout hardware. Experience gained is invaluable for commissioning at D0. ã Two major goals accomplished : certified adequate noise characteristics of BA-1 and BA-4 ( one of the most critical ones in terms of potential grounding problems ). established unprecedented degree of data integrity of our silicon readout system in a large scale operation. First convincing prove of the principle. At this point, Significant degree of confidence that it works out at D0 ! PLANS : ã Will continue chasing system bugs and problems  pushing the limits to achieve nominal 10% of readout channels : BA4 + FD6. ã Hope in a window of opportunity for a Cosmic Ray Test with BA4 + FD6 ã At the end of this month : noise studies on a H-disk. ã First week of November : See you at D0 !!!  50% Test turns to be a reality. Worries : ã Worries :  KSU IB delivery slow ! ( 15 boards a week, total of 144 IBs needed ). Anticipated complete delivery by early Jan  HV PS delivery slow.