1 SCA Cell Utilizing Scheme The output of each preamp-shaper channel is sampled continuously at 20 MHz and stored the SCA cells. There are 96 cells for each SCA channel. They are used as 12 blocks of 8 cells each. The blocks to be used in the sampling are kept in a (constantly updating) pool of free blocks. At any time, 2 blocks (16 cells) are taken from this pool to capture 8 useful voltage samples. They are put back into the pool when one of the following condition is satisfied. –No LCT trigger is found 800 ns later. –There is an LCT trigger, but there is no L1 accept  s later. –L1-LCT match found and digitization completed 26  s later.

2 LHC Rate Assumptions L1 accept: 100 kHz LCT rate: 69 kHz per CFEB (worst case – ME1/1) Estimated LCT rate for 10**34 lumi (D. Acosta et al, 2001) Chamber Type LCT rate per CFEB (kHz) ME1/1 69 ME1/2 4 ME1/3 2 ME2/1 21 ME2/2 3 ME3/1 11 ME3/2 2 ME4/1 8 ME4/2 9 L1-LCT coincidence rate per CFEB: 100 kHz x 70 kHz x 75 ns = 0.5 kH Digitization time (with 6 ADCs on each CFEB) 16 channels x 16 samples/channel x 100 ns = 26  s

3 Effective Buffer Size of SCA at LHC Average number of LCT’s during 2.2  s (=3  s-0.8  s) holding time for 2-blocks:  =2.2x10 -6 x70x10 3 =0.15 Average number of L1-LCT matches during 26  s digitization time:  =26x10 -6 x0.5x10 3 =0.013 Probability of overwriting SCA: 6.1x10 -10

4 Effective Buffer Size of SCA at SLHC At SLHC: use same L1 accept rate, exclude ME1/1, assuming rates go up linearly. Maximum LCT rate is 200 kHz (excluding ME1/1), L1-LCT match rate is 1.5 kHz. Average number of LCTs during 2.2  s (=3  s-0.8  s) holding time for 2-blocks:  =2.2x10 -6 x200x10 3 =0.44 Average number of L1-LCT matches during 26  s digitization time:  =26x10 -6 x1.5x10 3 =0.04 Probability of overwriting SCA: 9.3x10 -6

LHC SLHC Test Beam LCTL1A Rate (KHz) LCT Rate (KHz) SCA Overflow Probability 2 GigHz Fiber Limit

6 SCA Overflow Probability L1A-LCT time (  sec) SLHC Nominal LCT 200 KHz L1ALCT 2 KHz SCA Overflow versus L1A Latency

7 CSC FE Electronics Issues at SLHC Radiation (Probably OK) - present electronics tested to 3x(safety factor) 10 LHC years - SEU resets at LHC ~20 minutes -> 2 minutes at SLHC 25 nsec -> 12 nsec Crossing Time (OK Firmware Change) - no problems anticipated Data Flow (OK if LCT scales linearly) - we have seen no SCA overflows at 5X LHC rates - SCA rate calculations show CFEB can take even higher rates - SCA rates sensitive to LCT and L1A Latency - DAQMB has buffer overruns at ~15X LHC rates CFEB/DAQMB - cathode dominates data volume Viability of CFEB and DAQMB designs depend solely on LCT and L1A rates and latency.

8 Peripheral Crate 2 DMB, 2 TMB 1 CCB, 1 MPC FED crate 1 DDU PC TTC crate DAQ Data Trigger primitives S1 S2 S3 beam Track finder Crate TRIDAS Rate Capabilites of Present System 2003 Time Structured Beam Test Nominal LHC Rate/Chamber excluding ME1/1 and ME1/A 200 kHz LCT 2 kHz L1ALCT CPT Week: Nov. 6, 2003 J. Mumford We ran 100 kHz pion LCTs into 1 CFEB (5x LHC) 1 kHz LCTL1A (LHC) 16 time samples no problem 8 time samples no problem 10 kHz LCTL1A (10xLHC)16 time samples buffer overrun 8 time samples no problem Note: Buffer overwrites were on DAQMB. No overflow of SCAs was observed. SCA buffer calculations agree with results.

9 Paul, The usage of capacitors in the SCA has two bottlenecks. The first is a pipeline, while the second is a classic queuing problem. To solve probabilities correctly one should run a MonteCarlo, but here is a simplified back of the envelope calculation. There are 12 blocks of 8 capacitors in the firmware algorithm. Four are in use at anytime, though theoretically we can use all of the blocks. After the beam crossing the four blocks are shifted through until an LCT arrives (~800 nsec). Pipeline: When an LCT arrives two blocks are stored for a period of time T=L1A(time)-LCT(time)=~2usec. Since multiple sets of two blocks can be in the pipeline probabilities are given by a poissonian pdf with: mu=Rate*T ps0=poissonian(mu,0) ps1=poissonian(mu,1)... ps6=poissonian(mu,6) Queue: When the L1A arrives events with a correlated LCT will be digitized. In terms of queing theory our rate of arrival is the LCT*L1A rate of 1kHz. It takes approximately 25 usec to process the two blocks. (for queuing theory equations see rho=Rate*T=1.e3*25e-6=0.025 P0=1/(1+rho+rho**2+...) P1=rho*P0 P2=rho**2*p0... P6=rho**6*p0 Since the pipeline and queue are uncorrelated one would expect the probability of have more than 6 sets of 2 blocks occupied is: Prob:=1-ps0*(p0+p1+p2+p3+p4+p5+p6)-ps1*(p0+p1+p2+p3+p4+p5)- ps2*(p0+p1+p2+p3+p4)-...-ps6*p0 I will point you to slides monday. Cheers, Stan