Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Computer Organization Lecture 13 Controller implementations Register file design MDP16 overview

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Controller and datapath Inputs IR(31:25) Outputs

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Full FSM state diagram Inputs:Op Outputs: 13 signals States: 10

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering FSM architecture Present State NS Decoder Output Decoder Inputs Outputs Combo logic ROM MUX Combo logic ROM MUX Decoder Flip Flops

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering FSM controller State register (D- type FF) holds present state (PS)

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering PLA implementation State (PS) bits and Op determine outputs and next state Alternately, use a ROM IN OUT NS PS

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Project 4: Register File Two, 16-bit registers ($0, $1) Two read ports One write port Equal output

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Inputs InputFunction ResetForces the output to all zeros. CLKSynchronous clock for entire MDP16 design. DinPort with 16-bit number to load into register file. REGrdDefines read port contents 00 R1 = $0, R0 = $0 01 R1 = $0, R0 = $1 10 R1 = $1, R0 = $0 11 R1 = $1, R0 = $1 REGwrDefines destination register for writes 00Disable write port 01Write to register $0 10Write to register $1 11Write to register $1, $0 (both registers)

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Outputs OutputFunction R0outRead port zero (R0), 16-bits R1outRead port one (R1), 16-bits EQStatus bit that indicates R0 and R1 contain identical numbers $0Register $0 output for debugging, 16-bits $1Register $1 output for debugging, 16-bits

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Register design Read ports Write port

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering MDP16 overview Architecture similar to MIPS Sixteen-bit machine Two registers: $0, $1 Word addressing (0x0000 – 0xffff) Memory: 0xffff = 2 16 = 65,536 words Formats: R, I, J-types

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering MDP16 schematic

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering MDP16 schematic

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Instruction format opadr op rsrtadr/imm I J R op rsrt funcrd

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Basic questions Why do we have just two registers? What is the most positive and negative address offset? What is the range of the jump address?

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Instructions NameOpFormatFuncExampleMeaning add sub addi subi and or andi ori sll srl 11AB11CD2311AB11CD23 RRIIRRIIIIRRIIRRIIII 0 1 na 2 3 na add $0, $0, $1 sub $0, $0, $1 addi $0, $1, 20 subi $0, $1, 20 and $0, $0, $1 or $0, $0, $1 andi $0, $1, 1f ori $0, $1, 1f sll $0, $1 srl $0, $1 $0 = $0 + $1 $0 = $0 - $1 $0 = $ $0 = $ $0 = $0 & $1 $0 = $0 || $1 $0 = $1 & 1f $0 = $1 || 1f $0 = $1 << 1 bit $0 = $1 >> 1 bit

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Instructions, continued. NameOpFormatExampleMeaning nop lw sw beq j resv ,9 E,F J I J NA nop lw $0, c3 ($1) sw $0, c3 ($1) beq $0, $1, 2a j 23 NA No operation $0 = mem [$1 + c3] mem [$1 + c3] = $0 If ($0 == $1) go to (PC + 1) + 2a PC = PC [15- 12] || 23 NA

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Find machine instruction? InstructionTypeOp rsrtrdimmed /adr functMachine (hex) add $0, $0, $1 r na00000x1400 andi $0, $1, 10f I f0xc50f sll $0, $1 i x2400 lw $0, 323 ($1) I ten0x4a11 beq $0, $1, 17a j a64

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering MDP16 programming We do not have an assembler –Must “hand” assemble –Limited to small programs – Senior design project anyone? Assume the MIPS syntax, addressing, directives, labels

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Simple program

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Assemble the simple program? AddressMachine Instruction Assembly Instruction Comment 0000x1001 sub $0, $0, $0 # $0 = x1e01 sub $1, $1, $1 # $1 = xa002 addi $0,$0,0x2 # $0 = addi $1,$1,0x3 # $1 = add $0,$0,$1 # $0 = 5 All numbers in hex

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Basic questions Why do we have just two registers? Need only one bit to define What is the most positive and negative address offset? What is the range of the jump address? 0x000 to 0xfff = 0000 to 4095

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Find machine instruction? InstructionTypeOp rsrtrdimmed /adr functMachine (hex) add $0, $0, $1 R0x1010na0x00x1400 andi $0, $1, 10f I0xc10na0x10fna0xa90f sll $0, $1 I0x210na 0x2400 lw $0, 323 ($1) I0x410na0x323na0x4b23 beq $0, $1, 17a I0x610na0x17ana0x657a j a64 J0x7na 0xa64na0x7a64

Fall EE 333 Lillevik 333f06-l13 University of Portland School of Engineering Assemble the simple program? AddressMachine Instruction Assembly Instruction Comment sub $0, $0, $0 # $0 = e01 sub $1, $1, $1 # $1 = 0 002a002 addi $0,$0,0x2 # $0 = 2 003ac03 addi $1,$1,0x3 # $1 = add $0,$0,$1 # $0 = 5 All numbers in hex