Final Presentation Implementation of DSP Algorithm on SoC Student : Einat Tevel Supervisor : Isaschar Walter Accompanying engineer : Emilia Burlak The.

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Final Presentation Implementation of DSP Algorithm on SoC Student : Einat Tevel Supervisor : Isaschar Walter Accompanying engineer : Emilia Burlak The project is conducted with cooperation of Rafael. winter 2003/2004

Project Goals - Review Studying and investigating the architecture of System on Programmable Chip (SoC). Studying and investigating the architecture of System on Programmable Chip (SoC). Deciding on the Software/Hardware partition to be implemented. Deciding on the Software/Hardware partition to be implemented. Implementing a signal processing algorithm on the chosen platform. Implementing a signal processing algorithm on the chosen platform. Second Semester: Implementing a signal processing algorithm based on a FIR/IIR Filter with Programmable parameters. Simulating and checking the code of the algorithm in hardware and software. Simulating and checking the code of the algorithm in hardware and software. Running the algorithm on the board. Running the algorithm on the board.

Project Schedule Second Semester Project Schedule Second Semester Defining the algorithm - CIC Filters. Defining the algorithm - CIC Filters. Design - Block Scheme. Design - Block Scheme. Hardware. Hardware. Software. Software. Verification. Verification.

CIC Filters Overview CIC Filters Overview  Cascaded Integrator-Comb Filters.  Multirate filters used for realizing large sample rate changes in digital systems.  Multiplierless structures, consists only of: Adders, Subtractors and Registers.  Decimation.  Interpolation.

CIC Filters Structure Cascade of Integrators. Cascade of Integrators. Resampling Switch (decimate/expansion). Resampling Switch (decimate/expansion). Cascade of Differentiators. Cascade of Differentiators.

CIC Filters Parameters Number of Stages (N). Number of Stages (N). Rate Change Factor (R). Rate Change Factor (R). Differential Delay (M). Differential Delay (M).

CIC Filters Hardware/Software  Hardware:  Generic implementation of Decimator.  Generic implementation of Interpolator.  Software:  Filter parameters : N, R, M.  Filter Mux Select : Dec/Int.  Data input for filtering.  All wrapped into one in SoC.

Design System Components UART send/receive files. PPC405 Software. OPB CIC Filters Hardware Core. LEDs. SDRAM.

Design System Flow - Receiving file from PC. - File read and analyzed. - Sending parameters and data to filters. - Receiving processed data from filters. - Sending data to PC.

Design Block Scheme - Top - OPB SW-HW Intfc Generic SW-HW interface. - CIC Filters Implementation of the CIC Filters modules.

Block Scheme OPB SW-HW Intfc Using IPIF (IP Interface): a portable, pre-designed bus interface, that takes care of the bus interface signals, bus protocol and other interface issues.

Block Scheme SW-HW Intfc Consists of: Address Decoder. FIFOs. Control/Status Regs. Other signals: sw_rst params

Block Scheme CIC Filters Consists of: CIC Decimator. CIC Interpolator. CIC Filters Intfc.

Hardware Code written in VHDL : Code written in VHDL : Generic CIC Filters: Decimator, Interpolator. Generic CIC Filters: Decimator, Interpolator. Interfaces: SW-HW intfc, Filters Intfc. Interfaces: SW-HW intfc, Filters Intfc. Using “ user core reference design ” to Using “ user core reference design ” to instantiate the IPIF and attach it to the logic. FIFO - generated core from CoreGen. Simulation – Using Modelsim.

Software Flow Chart Receive Params from PC Send Params to Core Send START to Core Wait for FINISH from Core Send Data from Core to PC Wait for Input file from PC

Software Code Code written in C : Code written in C : Check_leds function : counting using LEDs. Check_leds function : counting using LEDs. Check_sdram function : Memory read/write. Check_sdram function : Memory read/write. CIC function: previous flow chart in a while loop. CIC function: previous flow chart in a while loop. Frequently used commands: XUartLite_RecvByte(uart_base_addr); XIo_Out32(cic_base_addr, control_reg); XIo_In32(cic_base_addr+20);

Verification Simulation of the CIC Algorithm in MATLAB: Simulation of the CIC Algorithm in MATLAB: data_out = dec_param(data_in, N,R,M) data_out = dec_param(data_in, N,R,M) data_out = int_param(data_in, N,R,M) data_out = int_param(data_in, N,R,M) The system ’ s output was compared to the MATLAB ’ s output using various inputs and parameters. The system ’ s output was compared to the MATLAB ’ s output using various inputs and parameters. MATLAB GUI. MATLAB GUI.

GUI Filter Params Files Results

GUI Features Filter Type, N, M, R, chosen by user. Filter Type, N, M, R, chosen by user. Data input file specified by user. Data input file specified by user. HW input filename specified by user. HW input filename specified by user. Creates HW input file to be run by user. Creates HW input file to be run by user. HW output filename specified by user. HW output filename specified by user. Runs SW simulation. Runs SW simulation. Compares and shows results using graph. Compares and shows results using graph.

Hardware Interface INPUT: INPUT: Receives file via UART using Hyper-Terminal. The file contains the data in the right format for the HW. The file can be created using the GUI. The file contains the data in the right format for the HW. The file can be created using the GUI. OUTPUT: OUTPUT: Sends the results via UART using Hyper- Terminal. The results are captured into file. The results are captured into file. The file can be read using the GUI. The file can be read using the GUI.

Hyper Terminal

Conclusions and Remarks. SoC is a powerful platform for integrating Hardware and Software. SoC is a powerful platform for integrating Hardware and Software. Still new and therefore encountered some problems. Still new and therefore encountered some problems.

Thank You