Implementation of SOP/POS Expressions

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Presentation transcript:

Implementation of SOP/POS Expressions Morgan Kaufmann Publishers 25 April, 2017 Implementation of SOP/POS Expressions Chapter 4 — The Processor

Outline Implementation of SOP Expressions Implementation of POS Expressions Positive & Negative Logic

Outline Implementation of SOP Expressions Implementation of POS Expressions Positive & Negative Logic

Implementation of SOP Expressions (1/2) Sum-of-Products expressions can be implemented using: 2-level AND-OR logic circuits 2-level NAND logic circuits AND-OR logic circuit F A B D C E F = A.B + C.D + E

Implementation of SOP Expressions (2/2) NAND-NAND circuit (by circuit transformation) a) Add double bubbles b) Change OR-with- inverted-inputs to NAND & bubbles at inputs to their complements F A B D C E E'

Outline Implementation of SOP Expressions Implementation of POS Expressions Positive & Negative Logic

Implementation of POS Expressions (1/2) Product-of-Sums expressions can be implemented using: 2-level OR-AND logic circuits 2-level NOR logic circuits OR-AND logic circuit G A B D C E G = (A+B).(C+D).E

Implementation of POS Expressions (2/2) NOR-NOR circuit (by circuit transformation) a) add double bubbles b) changed AND-with- inverted-inputs to NOR & bubbles at inputs to their complements G A B D C E E'

Outline Implementation of SOP Expressions Implementation of POS Expressions Positive & Negative Logic

Positive & Negative Logic (1/3) In logic gates, usually: H (high voltage, 5V) = 1 L (low voltage, 0V) = 0 This convention is known as positive logic. However, the reverse convention, negative logic possible: H (high voltage) = 0 L (low voltage) = 1 Depending on convention, same gate may denote different Boolean function.

Positive & Negative Logic (2/3) A signal that is set to logic 1 is said to be asserted, or active, or true. A signal that is set to logic 0 is said to be deasserted, or negated, or false. Active-high signal names are usually written in uncomplemented form. Active-low signal names are usually written in complemented form.

Positive & Negative Logic (3/3) Positive logic: Enable Active High: 0: Disabled 1: Enabled Negative logic: Enable Active Low: 0: Enabled 1: Disabled