COE 202: Digital Logic Design Combinational Circuits Part 3

Slides:

Advertisements

Similar presentations

Advertisements

Give qualifications of instructors: DAP

Princess Sumaya University

Functions and Functional Blocks

COE 202: Digital Logic Design Combinational Circuits Part 1

Decoders/DeMUXs CS370 – Spring Decoder: single data input, n control inputs, 2 outputs control inputs (called select S) represent Binary index of.

COE 202: Digital Logic Design Sequential Circuits Part 1 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office: Ahmad Almulhem, KFUPM.

1 Tutorial: ITI1100 Dewan Tanvir Ahmed SITE, UofO.

Overview Part 2 – Combinational Logic

ECE 2373 Modern Digital System Design Exam 2. ECE 2372 Exam 2 Thursday March 5 You may use two 8 ½” x 11” pages of information, front and back, write.

CPEN Digital System Design

COE 202: Digital Logic Design Combinational Circuits Part 3 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office: Ahmad Almulhem, KFUPM.

CS 151 Digital Systems Design Lecture 17 Encoders and Decoders

Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode) Chapter 3 – Combinational Logic Design Part 2 –

COE 202: Digital Logic Design Combinational Circuits Part 1

COE 202: Digital Logic Design Combinational Circuits Part 4

Part 2: DESIGN CIRCUIT. LOGIC CIRCUIT DESIGN x y z F F = x + y’z x y z F Truth Table Boolean Function.

Digital Logic Gates. Sum of Products (Review) Procedure: 1.Form a minterm for each combination of the variables that produces a 1 2.OR all the minterms.

Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. Terms of Use (Hyperlinks are active in View Show mode) Terms of Use Logic and Computer Design.

9/15/09 - L15 Decoders, Multiplexers Copyright Joanne DeGroat, ECE, OSU1 Decoders and Multiplexers.

Morgan Kaufmann Publishers

Chapter 3 Decoder and Encoder Digital Logic Design III

CS 151: Digital Design Chapter 3 3-8: Encoding. CS 151 Encoding Encoding - the opposite of decoding - the conversion of a maximum of 2 n input code to.

Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Logic Circuits I.

Combinational Circuit – Arithmetic Circuit

Logic Design A Review. Binary numbers Binary numbers to decimal  Binary 2 decimal  Decimal 2 binary.

COE 202: Digital Logic Design Combinational Circuits Part 3 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office: Ahmad Almulhem, KFUPM.

Ahmad Almulhem, KFUPM 2010 COE 202: Digital Logic Design Number Systems Part 4 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:

Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Logic Circuits I.

Digital Logic Design Review Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office: Ahmad Almulhem, KFUPM 2010.

Quiz What are the results of the following 4-bit bitwise logical operations? NOT OR NOR AND

COE 202: Digital Logic Design Combinational Circuits Part 4

Chapter 2Basic Digital Logic1 Chapter 2. Basic Digital Logic2 Outlines  Basic Digital Logic Gates  Two types of digital logic circuits Combinational.

ROM & PLA Digital Logic And Computer Design

1 Lecture #7 EGR 277 – Digital Logic Reading Assignment: Chapter 4 in Digital Design, 3 rd Edition by Mano Chapter 4 – Combinational Logic Circuits A)

Ahmad Almulhem, KFUPM 2009 COE 202: Digital Logic Design Combinational Logic Part 2 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:

CHAPTER 4 Combinational Logic

Exclusive OR Gate. Logically, the exclusive OR (XOR) operation can be seen as either of the following operations:exclusive OR (XOR) 1. A AND NOT B OR.

COE 202: Digital Logic Design Combinational Circuits Part 2 KFUPM Courtesy of Dr. Ahmad Almulhem.

Ahmad Almulhem, KFUPM 2010 COE 202: Digital Logic Design Combinational Logic Part 3 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:

CS221: Digital Logic Design Combinational Circuits

Decoders, Encoders, Multiplexers

CS 105 DIGITAL LOGIC DESIGN Chapter 4 Combinational Logic 1.

CS151 Introduction to Digital Design

Ahmad Almulhem, KFUPM 2010 COE 202: Digital Logic Design Combinational Logic Part 2 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:

Ahmad Almulhem, KFUPM 2010 COE 202: Digital Logic Design Combinational Logic Part 4 Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:

Chapter Four Combinational Logic 1. Discrete quantities of information are represented in digital systems by binary codes. A binary code of n bits is.

1 CS 151: Digital Design Chapter 3: Combinational Logic Design 3-1Design Procedure CS 151: Digital Design.

1 Fundamentals of Computer Science Combinational Circuits.

1 ECE 545—Digital System Design with VHDL Lecture 1 Digital Logic Refresher Part A – Combinational Logic Building Blocks.

Digital Systems Section 11 Decoders and Encoders.

Combinational Circuit Design. Digital Circuits Combinational CircuitsSequential Circuits Output is determined by current values of inputs only. Output.

Chapter 3: Combinational Functions and Circuits 3-5 to 3-7: Decoders

Module 11.  In Module 9, we have been introduced to the concept of combinational logic circuits through the examples of binary adders.  Meanwhile, in.

CS151 Introduction to Digital Design Chapter 3: Combinational Logic Design 3-5 Combinational Functional Blocks 3-6 Rudimentary Logic Functions 3-7 Decoding.

Digital Design Module 2 Decoder Amit Kumar AP SCSE, GU Greater Noida.

1 DLD Lecture 16 More Multiplexers, Encoders and Decoders.

Decoders Zhijian John Wang. What are they? Overview of a decoder A device that reverses the process of an encoder Convert information from one format.

C OMBINATIONAL L OGIC D ESIGN 1 Eng.Maha AlGubali.

Combinational Circuits

CS221: Digital Logic Design Combinational Circuits 3

Combinational Functions and Circuits

Lecture 4: Combinational Functions and Circuits

Reference: Chapter 3 Moris Mano 4th Edition

Digital Signals Digital Signals have two basic states:

COE 202: Digital Logic Design Combinational Circuits Part 3

13 Digital Logic Circuits.

Logic Circuits I Lecture 3.

Digital System Design Combinational Logic

Presentation transcript:

COE 202: Digital Logic Design Combinational Circuits Part 3 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Ahmad Almulhem, KFUPM 2009

Objectives Decoders Ahmad Almulhem, KFUPM 2009

iPhone motherboard (torontophonerepair.com) Functional Blocks Digital systems consists of many components (blocks) Useful blocks needed in many designs Arithmetic blocks Decoders Encoders Multiplexers iPhone motherboard (torontophonerepair.com) Ahmad Almulhem, KFUPM 2009

Decoder Information is represented by binary codes n-to-2n Decoder . n inputs 2n outputs . Information is represented by binary codes Decoding - the conversion of an n-bit input code to an m-bit output code with n <= m <= 2n such that each valid code word produces a unique output code Circuits that perform decoding are called decoders A decoder is a minterm generator Ahmad Almulhem, KFUPM 2009

Decoder (Uses) Decode a 3-bit op-codes: Home automation: 3-to-8 Add Sub And Xor Not Load Store Jump op0 op1 op2 2-to-4 Decoder Light A/C Door Light-A/C C0 C1 Load a Add b Store c . Ahmad Almulhem, KFUPM 2009

Decoder with Enable A decoder can have an additional input signal called the enable which enables or disables the output generated by the decoder n-to-2n Decoder . n inputs 2n outputs . Enable bit Ahmad Almulhem, KFUPM 2009

2-to-4 Decoder A 2-to-4 Decoder 2 inputs (A1, A0) 22 = 4 outputs (D3, D2, D1, D0) Truth Table A1 A0 D0 D1 D2 D3 1 Src: Mano’s book Ahmad Almulhem, KFUPM 2009

2-to-4 Decoder with Enable Truth Table EN A1 A0 D0 D1 D2 D3 X 1 Src: Mano’s book Ahmad Almulhem, KFUPM 2009

3-to-8 Decoder A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 1 3-to-8 Decoder D0 D1 1 3-to-8 Decoder D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 Ahmad Almulhem, KFUPM 2009

3-to-8 Decoder 3-to-8 Decoder D0 D1 D2 D3 D4 D5 A0 D6 A1 D7 A2 Ahmad Almulhem, KFUPM 2009

3-to-8 Decoder (using 2 2-to-4 decoders) A0 A1 A2 A0 A1 E A2 A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7 1 2-to-4 Decoder D4 D5 D6 D7 A0 A1 E Ahmad Almulhem, KFUPM 2009

Decoder-Based Combinational Circuits A Decoder generates all the minterms A boolean function can be expressed as a sum of minterms Any boolean function can be implemented using a decoder and an OR gate. Note: The Boolean function must be represented in terms of its minterms and not its minimized form Ahmad Almulhem, KFUPM 2009

Decoder-Based Combinational Circuits (Example F. A Decoder-Based Combinational Circuits (Example F.A. using 3-to-8 Decoder) S = ∑m (1,2,4,7) C = ∑m (3,5,6,7) 3 inputs and 8 possible minterms 3-to-8 decoder can be used for implementing this circuit X Y Z C S 1 Src: Mano’s book Ahmad Almulhem, KFUPM 2009

Decoder-Based Combinational Circuits (Summary) Good if: Many output functions with same inputs Each output has few minterms Hint: Check if the function complement has fewer minterms and use NOR instead of OR. Ahmad Almulhem, KFUPM 2009

NAND-Decoders (Self-Study) Past decoders were designed using AND gates. Other decoders are designed using NAND gates. You need to answer these questions: What is the NAND-Decoder? Why does the NAND-Decoder exist? How to use the outputs of the NAND-Decoder to represent a combinational circuit? Mohammad Nassef, FCI-CU-EG