Lecture 12 8086/8088 Hardware Specifications and Memory Interface Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.

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Lecture /8088 Hardware Specifications and Memory Interface Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU

8086 Microprocessor8088 Microprocessor 8.1: Barry B. Brey

Chapter 9: Memory Interface 1K Memory has A 0 – A 9 4K Memory has A 0 – A 11 Address Pins O 0 – O 7 for 8 bit computer O 0 – O 15 for 16 bit computer Output/Data Pins

Address Decoding Why need address decoding? – 8086/8088 has 20 address pins – But EPROM, the memory device has less space – For example, 2716 EPROM is a 2K memory device

NAND Gate Decoder Decode memory address locations FF800H – FFFFFH = FF800H = FFFFFH Figure: 9-12

Develop a NAND gate decoder so that it decodes the memory range DF800H – DFFFFH More Example

The 3-to-8 Line Decoder (74LS138)

Develop a 64K memory bank using eight 2764 EPROMs, where each 2764 EPROM is a 8K memory device and it address the memory locations F0000H – FFFFFH = F0000H = F1FFFH = F2000H = F3FFFH = F4000H = F5FFFH = F6000H = F7FFFH = F8000H = F9FFFH = FE000H = FFFFFH ****

= F0000H = F1FFFH = F2000H = F3FFFH = F4000H = F5FFFH = F6000H = F7FFFH = F8000H = F9FFFH = FE000H = FFFFFH ****

A 13 A 14 A 15 A 16 A 17 A 18 A 19

References Chapter 8, 9 The Intel Microprocessors – by Barry B. Brey