Approved for public domain release ( N68936-05-C-0066 on 10-10-2008 ) © 2008 BAE Systems - All rights reserved EVOLUTION AND APPLICATIONS OF SYSTEM ON.

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Presentation transcript:

Approved for public domain release ( N C-0066 on ) © 2008 BAE Systems - All rights reserved EVOLUTION AND APPLICATIONS OF SYSTEM ON A CHIP SPACEWIRE COMPONENTS FOR SPACEBORNE MISSIONS Joseph R. Marshall 5 November 2008 – International SpaceWire Conference

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 2 SpaceWire Components and their Applications SpaceWire ASIC Mini-RF Control Processor and Software SpaceWire Evaluation Board and Usage Next Generation SpaceWire ASICs

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 3 4 Port SpaceWire ASIC Block Diagram and Features SRAM PCI 2.2 DMA SOC Combined GSFC’s SpaceWire Core with BAE’s Core-Based Bridge ASIC

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 4 LRO Command and Data Handling (C&DH) / Spacecraft Architecture SpaceWire ASIC Key to LRO SpaceWire Network

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 5 MINI-RF Mini-RF Processor-Centric View Control Processor Slice External Power Other Mini-RF Slices Temperature Monitors Discrete Controls & Status Serial Peripheral Interface SpaceWire Other LRO Elements RAD750 Control Processor in Mini-RF Payload used SpaceWire for external interface and high speed internal interfaces

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 6 Control Processor Interfaces RAD750 Control Processor 28V Power 28V Return J01 (15) SpaceWire Port A J04-7 (4x9) SpaceWire Port B SpaceWire Port C SpaceWire Port D 8 Temp Sense SpaceWire JTAG RS422 UART P08 (51) J03 (51) SPI + 2 Disc +Gnd SPI + 2 Disc +Gnd 2 Discretes +Gnd 2 Discretes +Gnd Boot Discretes 2 Discretes +Gnd CPU JTAG RAD750 COP/JTAG Control & Status J02 (37) Four SpaceWire ports are used to perform all high speed interfacing

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 7 Mini-RF RAD750 Control Processor Block Diagram Mini-RF Processor Board Leveraged elements from several previous processor designs including LRO SBC

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 8 Control Processor Slice Isometric Views Control Processor Self-Contained within a stackable Slice with all connections by cable SpaceWire Connectors

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 9 Internal Software Structure Mini-RF Payload software Self-contained on Slice in PROM and EEPROM Built mostly from existing software modules

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 10 SpaceWire Evaluation Board Block Diagram A subset of the LRO SBC (and Mini-RF Processor), the SpaceWire Evaluation Board provides a Low Cost Breadboard for space applications

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 11 SpaceWire ASIC Evaluation Board Photos Easily fit on a 6U-160 CompactPCI board, The SpaceWire Evaluation Board plugs into standard COTS Backplanes

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 12 Multi-Port Router from SpaceWire Evaluation Boards JTAG SpaceWire ASIC Eval Bd 1 SpaceWire ASIC Eval Bd 2 SpaceWire ASIC Eval Bd 4 SpaceWire ASIC Eval Bd 3 SpaceWire Port PCI Bus SpaceWire Port 1 SpaceWire Port 2 SpaceWire Port 3 SpaceWire Port 8 SpaceWire Port 9 SpaceWire Port 10 SpaceWire Port 5 SpaceWire Port 6 SpaceWire Port 7 SpaceWire Port 4 SpaceWire Port 12 SpaceWire Port 11 SpaceWire Port 13 SpaceWire Port 14 SpaceWire Port 15 SpaceWire Port 16 RAD750 Evaluation Board PCI Bus Multiple Evaluation Boards may be combined to breadboard router Performance with more oorts than a single ASIC

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 13 Next Generation ASIC Block Diagram Integrates SpaceWire with RAD750 Interfaces

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 14 RAD6000MC ASIC block diagram Integrates SpaceWire with Embedded RAD6000

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 15 Core-Based ASIC Evolution Continuing Evolution of Core-Based ASICs for Processing Applications

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 16 Summary BAE System’s 4 Port SpaceWire ASIC, a core based system on a chip, is a key component of the LRO SBC and Mini-RF Payload The Mini-RF Control Processor utilizes SpaceWire for C&DH communications and high performance control of the Mini-RF Payload Software is self-contained and was built on full set of SpaceWire and RAD750 building blocks Evaluation Board has been developed that may be used to breadboard SpaceWire applications using the SpaceWire ASIC SpaceWire cores being combined with RAD750 and RAD6000 families for highest performance processing and standalone instrument applications as part of evolution of our system on a chip devices

5 November 2008 Approved for public domain release (N C-0066 on ) © 2008 BAE Systems - All rights reserved Components II Session - Marshall Paper - Page 17 Questions?