Chapter Four Combinational Logic 1

C OMBINATIONAL C IRCUITS It consists of input variables, logic gates and output variables. Output is function of input only i.e. no feedback When input changes, output changes (after a delay) n inputsm outputs Combinational Circuits  2

C OMBINATIONAL C IRCUITS Analysis Given a circuit, find out its function Function may be expressed as: Boolean function Truth table Design Given a desired function, determine its circuit Function may be expressed as: Boolean function Truth table ? ? ? 3

A NALYSIS P ROCEDURE Boolean Expression Approach F 1 =T 2 +T 3= AB'C'+A'BC'+A'B'C+ABC F 2 =AB+AC+BC T 2 =ABC T 1 =A+B+C F 2 =AB+AC+BC F’ 2 =( A’+B’ )( A’+C’ )( B’+C’ ) T 3 =AB'C'+A'BC'+A'B'C 4

A NALYSIS P ROCEDURE We can obtain the truth table directly from the logic diagram Truth Table Approach A B C F1F1 F2F = 0 T2 = 0 T1 = 0 0 F2 = 0 F’2 = 1 T3 =

6 Full Adder Circuit

A NALYSIS P ROCEDURE Truth Table Approach = 0 = 1 = 0 = 1 = 0 = 1 = 0 = A B C F1F1 F2F

A NALYSIS P ROCEDURE Truth Table Approach = 0 = 1 = 0 = 1 = 0 = 1 = 0 = 1 = A B C F1F1 F2F

A NALYSIS P ROCEDURE Truth Table Approach = 0 = 1 = 0 = 1 = 0 = 1 = 0 = A B C F1F1 F2F

A NALYSIS P ROCEDURE Truth Table Approach = A B C F1F1 F2F B 0101 A1010 C B 0010 A0111 C F 1 =AB'C'+A'BC'+A'B'C+ABC F 2 =AB+AC+BC 10

D ESIGN P ROCEDURE Given a problem statement: Determine the number of inputs and outputs Derive the truth table Simplify the Boolean expression for each output Produce the required circuit Example: Design a circuit to convert a “BCD” code to “Excess -3” code  4-bits  0-9 values  4-bits  Value+3 ? 11

D ESIGN P ROCEDURE BCD-to-Excess 3 Converter A B C D w x y z x x x x x x x x x x 1 1 x x C 111 B A xxxx 11 xx D C B A xxxx 1 xx D C B A xxxx 1 xx D C B A xxxx 1 xx D w = A+BC+BDx = B’C+B’D+BC’D’ y = C’D’+CDz = D’ 12 It needs 7 AND gates and 3 OR gates

13

D ESIGN P ROCEDURE w = A + B(C+D) x = B’(C+D) + B(C+D)’ y = (C+D)’ + CD z = D’ 14 A B C D w x y z x x x x x x x x x x 1 1 x x It needs 4 AND gates and 4 OR gates

S EVEN -S EGMENT D ECODER a b c g e d f ? wxyzwxyz abcdefgabcdefg w x y za b c d e f g x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x 1 1 x x x x x x x y x w xxxx 11 xx z BCD code a = w + y + xz + x’z’b =... c =... d =... 15

B INARY A DDER – S UBTRACTOR Digital computers perform a variety of information-processing tasks. Among the functions encountered are the various arithmetic operations. The most basic arithmetic operation is the addition of two binary digits. Half Adder Adds 1-bit plus 1-bit Produces Sum and Carry HA xyxy SCSC x y C S x + y ─── C S xyxy SCSC 16

Full Adder Adds 1-bit plus 1-bit plus 1-bit Two significant bits and a previous carry Produces Sum and Carry x y z C S x + y + z ─── C S FA xyzxyz SCSC y 0101 x1010 z y 0010 x0111 z S = xy'z'+x'yz'+x'y'z+xyz = x  y  z C = xy + xz + yz 17

B INARY A DDER Full Adder xyzxyz SCSC S = xy'z'+x'yz'+x'y'z+xyz = x  y  z C = xy + xz + yz 18 Implementation of full adder in sum of products form

B INARY A DDER Implementation of Full Adder with two half adder and an OR gate. xyzxyz SCSC HA xyzxyz SCSC 19

B INARY A DDER c 3 c 2 c 1. + x 3 x 2 x 1 x 0 + y 3 y 2 y 1 y 0 ──────── Cy S 3 S 2 S 1 S 0 FA x 3 x 2 x 1 x 0 FA y 3 y 2 y 1 y 0 S 3 S 2 S 1 S 0 C 4 C 3 C 2 C 1 0 Binary Adder x 3 x 2 x 1 x 0 y 3 y 2 y 1 y 0 S3S2S1S0S3S2S1S0 C0C0 C4C4 20

Subscript i3210 Input carry0110 Ci 1011 xi 0011 yi Sum1110 Si Output carry0011 Ci+1 21

B INARY S UBTRACTOR Use 2’s complement with binary adder x – y = x + (- y ) = x + y’

B INARY A DDER /S UBTRACTOR M : Control Signal (Mode) M = 0  F = x + y M = 1  F = x – y  F = x + y ’ + 1 y  0 = y y  1 = y' 23

O VER F LOW : When two numbers with n digits each are added and the sum is a number occupying n + 1 digits, we say that an overflow occurred. Unsigned Binary Numbers 2’s Complement Numbers (signed numbers) FA x 3 x 2 x 1 x 0 FA y 3 y 2 y 1 y 0 S 3 S 2 S 1 S 0 C 4 C 3 C 2 C 1 0 Carry Overflow

 An overflow cannot occur after an addition if one number is positive and the other is negative. Since adding a positive number to a negative number produces a result whose magnitude is smaller than the larger of the two original numbers.  An overflow may occur when the two numbers added are both (+) or both (-). Consider 8 bit register ( ).

Addition cases and overflow OFL

M AGNITUDE C OMPARATOR Compare 4-bit number to 4-bit number 3 Outputs: Expandable to more number of bits 0010, 1000 (Using XNOR Gates for equality) Magnitude Comparator A 3 A 2 A 1 A 0 B 3 B 2 B 1 B 0 A B

M AGNITUDE C OMPARATOR