Fall 2000M.B. Ibáñez Lecture 25 I/O Systems

Fall 2000M.B. Ibáñez Categories of I/O Devices Human readable –used to communicate with the user –video display terminals –keyboard –mouse –Printer From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Categories of I/O Devices Machine readable –used to communicate with electronic equipment –disk drives –tape drives –controllers –Actuators From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Categories of I/O Devices Communication –used to communicate with remote devices –digital line drivers –Modems From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Differences in I/O Devices Data Transfer Rate Application –disk used to store files must have file- management software –disk used to store virtual memory pages needs special hardware to support it –terminal used by system administrator may have a higher priority From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Differences in I/O Devices Complexity of control Unit of transfer –data may be transferred as a stream of bytes for a terminal or in larger blocks for a disk Data representation –encoding schemes Error conditions –devices respond to errors differently Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Hardware Device Port Bus Controller Computer System

Fall 2000M.B. Ibáñez Hardware PCI bus monitorprocessor cache memory Graphics controller Memory controller IDE disk controller disk

Fall 2000M.B. Ibáñez Techniques for Performing I/O Programmed I/O –process is busy-waiting for the operation to complete Interrupt-driven I/O –I/O command is issued –processor continues executing instructions –I/O module sends an interrupt when done From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Techniques for Performing I/O Direct Memory Access (DMA) –DMA module controls exchange of data between main memory and the I/O device –processor interrupted only after entire block has been transferred From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Programmed I/O: Polling Controller –Indicates its state through the busy bit in the status register. –Sets the busy bit when it is busy working –Clears the busy bit when it is ready to accept the next command Host –Signals its wishes via the command-ready bit in the command register –Sets the command ready bit when a command is available to execute

Fall 2000M.B. Ibáñez Programmed I/O: Polling ControllerHost status register data-out register command-register busy bit write bit ready bit 1 INF O 1 =0? 0 1

Fall 2000M.B. Ibáñez Simple Interrupt Processing Device controller or other system hardware issues an interrupt Processor finishes execution of current instruction Processor signals acknowledgment of interrupt Processor pushes PSW and PC onto control stack Processor loads new PC value based on interrupt Save remainder of process state information Process interrupt Restore process state information Restore old PSW and PC From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Interrupt Handler A program that determines nature of the interrupt and performs whatever actions are needed Control is transferred to this program Generally part of the operating system From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Multiple Interrupts Sequential Order Disable interrupts so processor can complete task Interrupts remain pending until the processor enables interrupts After interrupt handler routine completes, the processor checks for additional interrupts From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Multiple Interrupts Priorities Higher priority interrupts cause lower- priority interrupts to wait Causes a lower-priority interrupt handler to be interrupted Example when input arrives from communication line, it needs to be absorbed quickly to make room for more input From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Direct Memory Access (DMA) I/O exchanges occur directly with memory Processor grants I/O module authority to read from or write to memory Relieves the processor from the task Processor is free to do other things From Operating Systems. Internals and Design Principles. W. Stallings. Prentice Hall

Fall 2000M.B. Ibáñez Six step process to perform DMA transfer From Operating System Concepts. Silberschatz & Galvin Addison Wsley