ISUAL Mass Memory Robert Abiad

NCKU UCB Tohoku Mass Memory R. Abiad IFR 5-7 Mar Outline Description Requirements Interfaces Block Diagram Usage Scheme Parts Development Status

NCKU UCB Tohoku Mass Memory R. Abiad IFR 5-7 Mar Description 2.6 GBit organized as 64 M x 40 bits 32 bit data word 7 bit Error Correction Code per word corrects all single bit errors and detects all double bit and some multiple bit errors. Samsung K4S560832A-TL1H 256 Mbit base device organized as 32M x 8bit.

NCKU UCB Tohoku Mass Memory R. Abiad IFR 5-7 Mar Requirements Store data from Imager at 8M pixel/s data rate Store data from Array Photometer at 20k samples/s x 32 channels/sample = 640k channels/s Store data from Spectrophotometer at 10k samples/s x 6 channels/sample = 60k channels/s Read telemetry data at 1.6 Mb/s Allow read/write from DPU Allow read/write from DCM

NCKU UCB Tohoku Mass Memory R. Abiad IFR 5-7 Mar Mass Memory Interfaces ImagerIDC/ Mass Memory DPU 12 DATA SP AP CLK ENA DATA-1 CLK ENA DATA-2 DATA ENA CLK DCM 32 2 DATA 26 ADDR BUSY 2 2 Telemetry CLK DATA

NCKU UCB Tohoku Mass Memory R. Abiad IFR 5-7 Mar Priorities Imager Memory Refresh Telemetry Array Photometer Fast Spectrophotometer Slow Spectrophotometer DPU DCM

NCKU UCB Tohoku Mass Memory R. Abiad IFR 5-7 Mar Mass Memory Block Diagram 32MB SDRAM Level Shift Level Shift Data Interface Address Interface Imager AP SP DPU DCM TLM

NCKU UCB Tohoku Mass Memory R. Abiad IFR 5-7 Mar Usage Scheme Circular buffers Fill on trigger –N Pretrigger –M Posttrigger Buffer switch Buffer Allocation Trigger N M AA Buffer Allocation B

NCKU UCB Tohoku Mass Memory R. Abiad IFR 5-7 Mar SAMSUNG SDRAM Latch up immune up to 82 MeV/(mg/cm²) Radiation hardened to kRad total dose SEU susceptibility mitigated by EDAC Parts received Parts will be lot tested to verify radiation tolerance

NCKU UCB Tohoku Mass Memory R. Abiad IFR 5-7 Mar Development Status Parts selection –All major parts ordered Usage schemes designed Address interfaces designed Memory controller designed Issues –FPGA speed limitations –FPGA device selection