ATLU for AIDA High Rate Synchronous as well as Asynchronous 21/11/2013David Cussans, AIDA WP9.3, DESY1.

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Presentation transcript:

aTLU for AIDA High Rate Synchronous as well as Asynchronous 21/11/2013David Cussans, AIDA WP9.3, DESY1

New Features (w.r.t. EUDET) Synchronous (shared clocks) interface. – Allows higher trigger rate Interface by Gigabit Ethernet. – Readout PC can be remote. – IPBus protocol Higher rate discriminators ( ~ MHz count rate) – Threshold and constant-fraction – Thresholds remotely controllable. Timestamps on each scintillator input – More accurate timing. – Timestamp granularity increased from 3.2ns to 800ps 21/11/2013David Cussans, AIDA WP9.3, DESY2

Synchronous Interface Clock from TLU to DUT – Configurable frequency Trigger pulse only only clock cycle long – Trigger rate up to 40MHz ( though photo- multipliers will limit this ) Busy from DUT to TLU Check synchronization from time-stamp of each trigger ( measured in clock cycles) 21/11/2013David Cussans, AIDA WP9.3, DESY3

Synchronous Interface 21/11/2013David Cussans, AIDA WP9.3, DESY4

Asynchronous Interface EUDET style asynchronous interface remains – Synchronous/Asynchronous interface switchable by software Maximum DUT_Clock frequency increases ( by default to 20MHz ). – Can read out trigger numbers faster 21/11/2013David Cussans, AIDA WP9.3, DESY5

Asynchronous Interface 21/11/2013David Cussans, AIDA WP9.3, DESY6

Spill/Shutter signal Optional, programmable spill/shutter signal In short term will be a fixed on/off period Could extend to be on for a fixed number of triggers, or a fixed time, or whichever comes first. Useful for a number of Linear Collider detectors / readout system. 21/11/2013David Cussans, AIDA WP9.3, DESY7

Use for TimePix Telescope AIDA mini-TLU has only three DUT interfaces Fan-out one interface to six using Uni Mainz board. – Takes “or” of BUSY signals – VME format Allows AIDA mini-TLU to provide synchronization signals for TimePix telescope – Similar or identical firmware – Firmware developed by Alvaro Dosil, USC 21/11/2013David Cussans, AIDA WP9.3, DESY8

Hardware Status Small run of prototype TLU made earlier this year. – Serious “bug” – incorrect connector rotation – Two boards fixed up so they can be used for firmware/software development. 21/11/2013David Cussans, AIDA WP9.3, DESY9

Hardware Status “bug-fixed” design has been submitted for manufacture ( Igor Rubinski, DESY). – Ten PCBs fabricated. Being shipped from China. – Will assemble components on three. If board works well, will ask other groups if they would like one. – Cost likely to be about €1500 (TBC) 21/11/2013David Cussans, AIDA WP9.3, DESY10

Firmware/Software Status EUDAQ Producer for AIDA TLU being written by Francesco Crescioli, LPNHE/IN2P3 Firmware being written by Alvaro Dosil, USC and D.Cussans, Bristol Integration/Development session planned December at DESY 21/11/2013David Cussans, AIDA WP9.3, DESY11

Common DAQ Interface A proposal for hardware timing and synchronization signals has been written and will be circulated. – Draft at erialId=0&confId= erialId=0&confId= Meeting to discuss common DAQ at DESY, December 10 th – Remote access via Vidyo – Please let me know if you want to attend and/or contribute. 21/11/2013David Cussans, AIDA WP9.3, DESY12

Summary New hardware synchronization scheme proposed for high-rate ( ~ MHz ) beams. New hardware prototype built. Firmware/software being developed. Common DAQ meeting next month. 21/11/2013David Cussans, AIDA WP9.3, DESY13