A CMOS Channel-Select Tunable Filter for 3G Wireless Receivers by Hussain Alzaher, Noman Tasadduq 1 and Mohammed Ismail 2 1. Electrical Engineering Department, KFUPM, Dhahran 31261, Saudi Arabia 2. Analog VLSI Lab., Ohio-State University, Columbus 43210, USA

Outline  Introduction 2G standards Evolution of 3G standards  Receiver Architectures Superheterodyne Double IF conversion Direct conversion 3G multi-standards  Analog - Digital Interface  Baseband Design Requirements  Proposed Baseband Filter Techniques Motivations and literature review DCCF based technique  Proposed filter Design Experimental Results

Introduction Second-generation (2G) mobile radio systems 1.Global System for Mobile Communications (GSM) in Europe and worldwide 2.North American Digital Cellular (IS-54/IS-136) & (IS-95) in USA 3.Personal Digital Cellular (PDC) in Japan  Different Characteristics: Frequency band, Channelization, Frame size & Bit Rate  Different Bandwidths: PDC (13KHZ), IS-54 (15KHz), GSM (100KHz) & IS-95 (630KHz)  Limited to Voice and Low Data-rate

Third generation (3G): Future wireless systems Broadband Multimedia and High Data Rate Universal Access and Global Roaming Wide-band Code Division Multiple Access (WCDMA) More Bandwidth 2.1/4/8 MHz for Different data rate Backward Compatibility to 2G Saving Today's Investment Multi-standard Wireless Receivers Introduction

2G digital cellular systems

Introduction System characteristics of 3G standards

Receiver Architectures  3G Receiver  Low-cost + Single-chip + Low power + Multi-standard  Conventional Superheterodyne Receiver  Not Suitable: Discrete-component Filters and Expensive Technologies  Direct Conversion & wide-band IF double conversion  Integrated Architectures  Eliminate Off-chip Filtering  Perform Channel Filtering at Baseband  Allow Design of Programmable Multi-standard Integrated Channel Select Filter  Adjacent Channel Blocker Require High Dynamic Range Designs

Receiver Architectures Conventional superheterodyne receiver

Receiver Architectures Wide-band IF with double conversion receiver

Receiver Architectures Direct conversion receiver

Receiver Architectures A typical architecture for a multi-standard receiver

Receiver Architectures Sharing Filter Low power & Cost-effective Most Significant Hardware Saving Digital Tuning: Eliminates Auxiliary DAC Digital Automatic Frequency Tuning Programmable + DR = Challenge

Analog - Digital Interface Digital Filtering: ADC Design Stringent Hard Implementation + More Power Aliasing considerations High order filters: ADCs with low dynamic range and sampling rate Analog filter: Much less power A 16-bit 20MHz: 183mA A 6-bit 40MHz ADC: 23mA

Baseband Design Requirements Attenuate blockers Highly Linear: Inter-modulation (IP3) Low Noise High Dynamic Range

Motivations and Literature Review g m -C Filters: Poor Dynamic Range S-C Filters: Frequency vs. Power Active-RC and g m -RC: Capacitor Matrices Power: Area & Cutoff Frequency Precision Interleaving Filtering/Amplification: Improving Dynamic Range Proposed Baseband Filter Techniques

Multi-standard Requirement Wide Programmability for Different Standard: PDC, IS-54, GSM, IS-95, WCDMA Precise Frequency for Channel Selection S-C Filter Problem with 2.1MHz WCDMA Active RC and Highly linear g m -RC: Optimizing Power Capacitor Matrices: Large Area for Low Frequency & Precision Proposed Baseband Filter Techniques

Multi-standard performance comparison Proposed Baseband Filter Techniques

DCCF Based Technique Digitally controlled current follower (DCCF) & unity gain voltage buffer Poly-silicon resistors and capacitors Current division network (CDN) Proposed Baseband Filter Techniques

Digitally controlled current follower (DCCF) DCCF Based Technique

NMOS current division network Symbol of the DCCF DCCF Based Technique

Original Buffer DCCF Based Technique

Transformation DCCF Based Technique

Improved buffer DCCF Based Technique

Fully Differential Architecture Fully differential building block topology DCCF xz xz CMFB Ip In Vop Von

Fully differential realization of the proposed DCCF-VB DCCF Based Technique

Filter Design  Adding R-2R Ladders to Filter Design  Allow the accommodation of GSM, IS-54 with 15Khz, 100Khz Bandwidths  GSM: R=10k , C=160pF  IS-54: R=10k , C=1nF  IS-54: 8-bit R2R ladders R=10k , C=4pF

Filter Design where

Filter Design Proposed second-order filter section

Filter Design

Experimental Results Photomicrograph of the 6-th order filter

Experimental Results Measured ac response: PDC and IS-54

Experimental Results Measured ac response: GSM

Experimental Results Measured ac response: IS-95

Experimental Results Measured ac response: WCDMA

Experimental Results Performance of proposed filter based on DCCF