Lecture 6. VFP & NEON in ARM

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Lecture 6. VFP & NEON in ARM COMP427 Embedded Systems Lecture 6. VFP & NEON in ARM Prof. Taeweon Suh Computer Science & Engineering Korea University

ARM Processor Portfolio ARM7TDMI T: Thumb, D: Debug, M: Multiplier, I: ICE The "D" represented a JTAG TAP for debugging; the "I" denoted an ICEBreaker debug module supporting hardware breakpoints and watchpoints, and letting the system be stalled for debugging. ARM925EJ-S E: Enhanced DPS Extension J: Jazelle (Direct execution of 8-bit Java bytecode in hardware) S: Synthesizable core ARM1156T2(F)-S T2: Thumb-2 enhancement Z: Should be TrustZone? Source: 2008 Embedded SW Insight Conference

ARMv7-A www.arm.com ACP: Accelerator Coherency Port SCU: Snoop Control Unit www.arm.com

NEON & VFP www.arm.com

Register Mapping NEON Advanced SIMD and VFP use the same register set

NEON Advanced SIMD (Single Instruction Multiple Data) It supports 8, 16, 32 and 64-bit integer and single-precision (32-bit) floating point data Up to 16 operations at the same time 1B x 16 = 16B (= 1 quad word) http://en.wikipedia.org/wiki/ARM_architecture

VFP (Vector Floating Point) FPU (Floating Point Unit) coprocessor extension to ARM architecture Single-precision and double-precision FP computation Compliant with IEEE 754-1985 Intended to support execution of short “vector mode” instructions, but operated on “each” vector element sequentially Thus, did not offer the performance of true SIMD This vector mode was thus removed shortly after its introduction, to be replaced with the much more powerful NEON Advanced SIMD http://en.wikipedia.org/wiki/ARM_architecture

ARM Processor Selector www.arm.com