WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 ASIC Building Blocks for SLHC ACEOLE Mid Term Review 3 rd August 2010 CERN – Geneva, Switzerland Paulo Moreira Work package 2
WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 ACEOLE fellow (ESR – 1 st June 2009): José Pedro Cardoso Associated partner: INESC Porto / University of Porto Visiting Scientist: Dr. Jose Machado da Silva CERN: Work package leader: Paulo Moreira People
WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 ASIC Building Blocks for SLHC: Oscillators Industrial Communications Telecommunications Mobile/cellular/portable radio, telephone & pager Aviation Marine Navigation Instrumentation Computers Digital systems CRT displays Disk drives Modems Tagging/identification Utilities Sensors Research & Metrology Atomic clocks Instruments Astronomy & geodesy Space tracking Celestial navigation HEP accelerators/detectors Aerospace: Communications Navigation IFF Radar Sensors Guidance systems Automotive Engine control, stereo, Clock Trip computer, GPS Consumer Watches & clocks Cellular & cordless phones, pagers Radio & hi-fi equipment Color TV Cable TV systems Home computers VCR & video camera CB & amateur radio Toys & games Pacemakers Other medical devices
WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST st Secondment period: 2009/9/7 to 2010/4/1 Partner: INESC Porto, Portugal (University of Porto, Portugal) PhD in Electrical and Computer Engineering: Seminar topics Microelectronic and Microelectromechanical technologies Test and Design for Testability Digital Communications Systems 2 nd Secondment period: 2011/02/25 to 2011/07/29 Second semester of PhD studies Secondment
WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Dr. Jose Machado da Silva 5 th and 6 th of February 2010: “Test and Design for Testability of Analogue and Mixed-Signal Circuits” (6 H) Course notes: Dr. João Canas Ferreira 25 th and 26 th 2010: “Run-Time Reconfiguration of Hardware” (6 H) Course notes: Training by Associated Partners
WP1 WP2 WP3 WP4 WP5 COORDINATOR WORK PACKAGE LDR RESEARCHER ACEOLE MID TERM REVIEW CERN 3 RD AUGUST 2010 Milestones and Deliverables Del. no. Titles of the Research Training Themes and description of deliverables and milestones Nature [1] [1] Dissemina tion level Delivery date [2] [2] Status TC21 Complete initial training courses (ASIC design, CAD tools, theory of phase-locked loops etc) n.a.6 Complete D21 Sign-off specification document for ASIC (IP block) RPublic6 Complete W2n Organize microelectronics user TWEPP workshop n.a.12,24,36 Complete (1/3) M21 Tape out prototype design ready for submission ORestricted18 - D22 Completion of testing and irradiation of prototype ASIC with conference report or journal publication P + RPublic27 - M22 Tape out final ASIC design ready for submission ORestricted29 - D23 Complete testing/irradiation of final ASIC and system-level integration test. Final conference report and/or journal publication D + RPublic36 - [1] [1] The nature of the deliverable is coded as follows: R = Report, P = Prototype, D = Demonstrator, O = Other [2] [2] For research themes 1-5 the delivery dates are measured in months from the start of individual ESR contracts.