Stepchenkov Yuri, Zakharov Victor, Rogdestvenski Yuri, Diachenko Yuri, Morozov Nickolai, Stepchenkov Dmitri Institute of Informatics Problems, Federal.

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Stepchenkov Yuri, Zakharov Victor, Rogdestvenski Yuri, Diachenko Yuri, Morozov Nickolai, Stepchenkov Dmitri Institute of Informatics Problems, Federal Research Center "Computer Science and Control" of the Russian Academy of Sciences, IPI RAS, Moscow, Russian Federation IPI RAS EWDTS-20151

 Why Speed-Independent circuits?  Structure chart of SI-Coprocessor  Ternary ST-coding  Simplified indication  SI-coprocessor’s pipeline  SI-coprocessor’s features  Conclusions IPI RAS EWDTS-20152

IPI RAS EWDTS  They reduce power consumption due to removing both clock generator, and "clock tree" out of a circuit  They have wide workability range on power supply and temperature

IPI RAS EWDTS MOPS Die, mm 2 ΔUdd*ΔT Consumption, % Synchron, “SRT-4”Synchron, “Newton”Quasi-SI, “SRT-2” Parameter Variant Maximum performance at any environment  Extended workability range  Constant faults detection  Average power consumption  Minimum noise level 

IPI RAS EWDTS Usage of SI-nets in a design, % Years

IPI RAS EWDTS

IPI RAS EWDTS

IPI RAS EWDTS Synchronous redundant code Self-Timed redundant (ternary) code State Binary code StateST ternary code ABApAmAn – N/A11spacer000

IPI RAS EWDTS

IPI RAS EWDTS Indication subcircuit

IPI RAS EWDTS

IPI RAS EWDTS

IPI RAS EWDTS transistors, 7 stages

IPI RAS EWDTS transistors, 4 stages

IPI RAS EWDTS  Bitwise indicators  Full indication only in spacer phase

IPI RAS EWDTS

IPI RAS EWDTS One bit of input register InpR

IPI RAS EWDTS ParameterValue Complexity, transistors Die size, mm Performance, Gflops0.54 Latency, ns Power consumption, mW/Gflops 450

Testing SI-Coprocessor IPI RAS EWDTS SI FPC First result Compa- rator OK Data

Conclusions  At first time in the world, really SI-FPC unit performing FMA operation was implemented  Usage of ternary ST-code provided best performance of the Wallace tree  Simplified indication allowed for reducing both the complexity and work phase time  Two-stage pipeline sufficiently decreased hardware cost at minimal drop of performance IPI RAS EWDTS

Thanks! IPI RAS EWDTS

Contacts  Director: academician Sokolov I.A.  Address: Institute of Informatics Problems of the Federal Research Center "Computer Science and Control" of the Russian Academy of Sciences (IPI RAS), Moscow, Russian Federation, , Vavilova str., 44, b.2  Tel: +7 (495)  Fax: +7 (495)   Stepchenkov Y.A., tel. +7 (495) , IPI RAS EWDTS