1/23/20067CPS4200 System Programming Spring 1 Systems Programming Chapter 1 Background III

1/23/20067CPS4200 System Programming Spring SIC Programming Examples In Figure 1.2(a), –3-byte word is moved by loading it into register A and then storing the register at the desired destination. –RESW reserves one or more words of storage –WORD reserves one word of storage, which initialized to a value defined in operand field of the statement. –The statement BYTE and RESB performs similar storage-definition

1/23/20067CPS4200 System Programming Spring SIC Programming Examples LDAFIVE STAALPHA LDCHCHARZ STCHC1 … ALPHARESW1 FIVE WORD5 CHARZBYTEC’Z’ C1RESB1 Figure 1.2 (a) SIC

1/23/20067CPS4200 System Programming Spring SIC Programming Examples In Figure 1.2(b), –shows same two data-movement operations in SIC/XE. –Immediate addressing: #5 –Decimal value of ASCII code for ‘Z’ is 90.

1/23/20067CPS4200 System Programming Spring SIC Programming Examples LDA#5 STAALPHA LDA #90 STCHC1 … ALPHARESW1 C1RESB1 Figure 1.2(b) SIC/XE 12

1/23/20067CPS4200 System Programming Spring SIC Programming Examples In Figure 1-3 (a) –Use register A –ALPHA + INCR – 1 then store it in BETA –GAMMA + INCR – 1 then store it in DELTA

1/23/20067CPS4200 System Programming Spring SIC Programming Examples LDAALPHA ADDINCR SUBONE STABETA LDAGAMMA ADDINCR SUBONE STADELTA … ONEWORD1. ALPHARESW1 BETARESW1 GAMMARESW1 DELTARESW1 INCRRESW1 Figure 1-3 (a) SIC

1/23/20067CPS4200 System Programming Spring SIC Programming Examples In Figure 1-3(b) –The value INCR is loaded onto register A –Using ADDR to add this value to register A –Using immediate addressing –The program is more efficient

1/23/20067CPS4200 System Programming Spring SIC Programming Examples LDSINCR LDAALPHA ADDRS, A SUB#1 STABETA LDAGAMMA ADDRS, A SUB#1 STADELTA … …. ALPHARESW1 BETARESW1 GAMMARESW1 DELTARESW1 INCRRESW1

1/23/20067CPS4200 System Programming Spring SIC Programming Examples Looping and Indexing operation: –In Figure 1-4 (a), it shows a loop that copies one 11-byte character string to another.

1/23/20067CPS4200 System Programming Spring SIC Programming Examples LDXZERO MOVECHLDCHSTR1, X STCHSTR2, X TIXELEVEN JLTMOVECH … STR1BYTEC’TEST STRING’ STR2RESB11. ZEROWORD0 ELEVENWORD11 Figure 1-4(a) SIC

1/23/20067CPS4200 System Programming Spring SIC Programming Examples LDT#11 LDX#0 MOVECHLDCHSTR1, X STCHSTR2, X TIXRT JLTMOVECH … STR1BYTEC’TEST STRING’ STR2RESB11. ZEROWORD0 ELEVENWORD11 Figure 1-4(b) SIC/XE

1/23/20067CPS4200 System Programming Spring SIC Programming Examples LDAZERO STAINDEX ADDLPLDXINDEX LDAALPHA, X ADDBETA, X STAGAMMA, X LDAINDEX ADDTHREE STAINDEX COMPK300 JLTADDLP … INDEXRESW1 … ALPHARESW100 BETARESW100 GAMMARESW100. ZEROWORD0 K300WORD300 Figure 1-5(a) SIC

1/23/20067CPS4200 System Programming Spring SIC Programming Examples LDS#3 LDT#300 LDX#0 ADDLPLDAALPHA, X ADDBETA, X STAGAMMA, X ADDRS, X COMPRX, T JLTADDLP … ALPHARESW100 BETARESW100 GAMMARESW100. Figure 1-5(b) SIC/XE

1/23/20067CPS4200 System Programming Spring SIC Programming Examples I/O –Read 1 byte of data from device F1 and copy it to device 05. –RD (Read data) transfers 1 byte of data from this device into the rightmost byte of register A. –TD (Test Device) test the addressed device and the condition code (CC) is set to indicate the result of this test. CC  “less than” if the device is ready CC  “equal” if the device is not ready

1/23/20067CPS4200 System Programming Spring SIC Programming Examples INLOOP TDINDEV JEQINLOOP RDINDEV STCHDATA. OUTLPTDOUTDEV JEQOUTLP LDCHDATA WDOUTDEV. INDEVBYTEX’F1’ OUTDEVBYTEX’05’ DATARESB1 Figure 1.6 I/O

1/23/20067CPS4200 System Programming Spring SIC Programming Examples JSUBREAD … READLDXZERO RLOOPTDINDEV JEQRLOOP RDINDEV STCHRECORD,X TIXK100//Add 1 to index and compare to 100 JTLRLOOP RSUB. INDEVBYTEX’F1’ RECORDRESB100 ZEROWORD0 K100WORD100 Figure 1.7 (a) SIC Subroutine

1/23/20067CPS4200 System Programming Spring SIC Programming Examples JSUBREAD … READLDX#0 RLOOPTDT#100 JEQRLOOP RDINDEV STCHRECORD,X TIXRT JTLK100 RSUB. INDEVBYTEX’F1’ RECORDRESB100 Figure 1.7 (b) SIC/XE Subroutine

1/23/20067CPS4200 System Programming Spring (CISC) Machine-Self Reading Complex Instruction Set Computer (CISC) –Relatively large and complicated instruction set –Several different instruction format and length –Many different addressing modes –VAX family and Intel x86 family

1/23/20067CPS4200 System Programming Spring (CISC) Machine VAX family –Memory Byte addressing Two consecutive bytes  word, four bytes  longword, eight byte  quadword, sixteen bytes  octaword. Virtual address space 2 32 bytes. One half of the virtual space is for operating system  system space Another half of the virtual space is called process space –Register 16 general-purpose registers, R0-R15, 32 bits R15 is the program counter, points to the next instruction byte to be fetched

1/23/20067CPS4200 System Programming Spring (CISC) Machine –Register R14 is stack pointer SP, which points to the current top of the stack R13 is the frame pointer FP, VAX procedure call build a data structure called a stack frame, and place its address in FP. Processor status longword (PSL) contains state variable and flags associated with a process. –Data Formats Integer: byte, word, longword, quadword, or octaword,2’s complement representation for negative Four different floating-point data format from 4 to 16 bytes.

1/23/20067CPS4200 System Programming Spring (CISC) Machine –Instruction Formats Variable length instruction format. Instruction consists of an operation code (1 or 2 bytes) followed by up to six operand specifiers. –Addressing Modes Large number of addressing modes. With only few exceptions, any of these addressing modes may be used with any instruction. The operand itself may be in a register, or its address may be specified by a register.

1/23/20067CPS4200 System Programming Spring (CISC) Machine There are several base relative addressing modes, with displacement fields of different lengths; when used with register PC, there become program- counter relative modes. –Instruction Set Instruction mnemonics are formed by combining: –A prefix that specifies the type of operation, –A suffix that specifies the data type of the operands, –A modifier that gives the number of operands involved. –Example: ADDW2, add operation with two operands, each a word in length.

1/23/20067CPS4200 System Programming Spring (CISC) Machine –Input/Output I/O device controller each controller has a set of control/status and data registers, which are assigned locations in the physical address space. The portion of the address space into which the device controller registers are mapped is called I/O space. The memory management routines will handle the association of an address in I/O space with a physical register in a device controller.

1/23/20067CPS4200 System Programming Spring (RISC) Machine RISC (Reduced Instruction Set Computer) –A RISC machine is characterized by a standard, fixed instruction length (usually equal to one machine word), and single-cycle execution of most instructions. –The number of machine instructions, instruction formats, and addressing modes is relatively small. –UltraSPARC, PowerPC, and Cray T3E supercomputing system

1/23/20067CPS4200 System Programming Spring (RISC) Machine UltraSPARC Architecture –Memory Byte address Two consecutive bytes  halfword, Four bytes  word, Eight bytes  doubleword. Virtual address space of 2 64 bytes. Each segment is 256 megabytes. Each segment is divided into pages, which are 4096 bytes.

1/23/20067CPS4200 System Programming Spring (RISC) Machine UltraSPARC Architecture –Register Includes a large register file that usually contains more than 100 general-purpose registers. Any procedure can only access 32 registers, r0 to r31. The first eight registers are global. The other 24 registers available to a procedure can be visualized as a window. These windows overlap, so some registers in the register file are shared between procedures.

1/23/20067CPS4200 System Programming Spring (RISC) Machine Floating-point computations are performed using a special floating-point unit. This unit contains a file of 64 double-precision floating-point registers. –Data Formats Integers, floating-point values and characters. Integers are stored as 8-, 16-, or 64-bit binary numbers. Singed and unsigned are supported. Three different floating-point data format.

1/23/20067CPS4200 System Programming Spring (RISC) Machine –Instruction format Three basic instruction formats an all are 32 bits long. Format 1 is for call instruction. Format 2 is for branch instruction. Format 3 is for register loads and stores, and three-operand arithmetic operations. –Addressing modes Immediate mode and register direct mode.

1/23/20067CPS4200 System Programming Spring (RISC) Machine PC-relative Register indirect with displacement Register indirect indexed –Instruction Set Less than 100 instruction set. Instruction execution in pipelined.

1/23/20067CPS4200 System Programming Spring (RISC) Machine –I/O A range of memory location is logically replaced y device registers. Each I/O has a unique address, or set of addresses, assigned to it. When a load or store instruction refers to this device register area of memory, the corresponding device is activate.

1/23/20067CPS4200 System Programming Spring 32 Homework #1 Due 1/30/07 Homework: p Write a sequence of instructions for SIC to set ALPHA equal to the product of BETA and GAMMA. Assume that ALPHA, BETA, and GAMMA are defined as in Figure 1.3(a). 2.Write a sequence of instruction for SIC/XE to set ALPHA equal 4*BETA-9. Assume that ALPHA and BETA are defined as in Figure 1.3(b). Use immediate addressing for the constants 3.Write a sequence of instructions for SIC/XE to clear a 20-byte string to all blanks. Use immediate addressing and register-to-register instructions to make the process as efficient as possible.