Design & Co-design of Embedded Systems Sharif University of Technology Computer Engineering Dept. Fall-Winter 2005 Maziar Goudarzi.

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Presentation transcript:

Design & Co-design of Embedded Systems Sharif University of Technology Computer Engineering Dept. Fall-Winter 2005 Maziar Goudarzi

Design & Co-design of Embedded Systems 2 What the Course Covers Introduction (1-2 weeks) –Review the evolution of HW design methodologies –Introduction to Embedded Systems (ES) –Overview of essential issues in system design System Specification (4-5 weeks) –Various models of computation –SystemC language System Implementation (3-4 weeks) –Traditional style of ES design –Co-synthesis techniques & algorithms –New technologies: programmable SoC devices System Verification(1-2 weeks) –Overview of approaches –HW-SW co-simulation techniques Advanced Topics (The rest) –Platform-based design, ASIP-based design, Object-orientation in ES design

Design & Co-design of Embedded Systems 3 Course Grading ItemScore ExamsQuizzes Final Exam 50 AssignmentsHomework30 Final project 20 Reading assignment (optional) 10

Design & Co-design of Embedded Systems 4 What you do Homework –HW design (SystemC) –System design (C++/SystemC) –Algorithm Implementation Final Project –Implement a HW-SW system on a PSoC –Other topics (negotiable) Reading Assignment –Read, summarize, and present selected papers –Optional, but highly recommended

Design & Co-design of Embedded Systems 5 For project: –Phase zero: Select your partner(s) Submit list of your group members (2-3 persons) –Phase one: Get familiar with the topic Submit report 1 (2-3 pages) covering: –List of your collected material –Your plan for next phases and role of each person –Phase two: Start implementing the system Oral presentation (15 min.) + report 2 (5-6 pages) –Phase three: Finalize the system implementation Demonstrate working HW-SW system A paper-like report (max. 10 pages, IEEE format) What you do (cont.)

Design & Co-design of Embedded Systems 6 Time is valuable! For project: –phase 1 and written part of phase 2 5% penalty per day for being late –oral presentation of phase 2 No late presentation is possible –final report No late submission can be accepted For homework –5% penalty per day for being late

Design & Co-design of Embedded Systems 7 Tools to work with A number of HW design, synthesis, and simulation tools SystemC Simulation Exercises –MS Visual-C (or higher) –SystemC_Win & C++ Builder 5.0 More than 3 hours per week is required

Design & Co-design of Embedded Systems 8 Teaching Assistants Naser MohammadZadeh Morteza NajafVand

Design & Co-design of Embedded Systems 9 References –Text book: W. Wolf, "Computers as Components: Principles of Embedded Computing System Design, " Morgan Kaufmann Publishers, –Other references: J. Staunstrup, W. Wolf, "Hardware/Software Codesign: Principles and Practice," Kluwer Academic Publishers, G. DeMicheli, "Hardware/Software Codesign," Kluwer Academic Publishers, S. Kumar, S. Klumar, “The Codesign of Embedded Systems: A Unified Hardware/Software Representation”, Kluwer Academic Publishers, H. Chang, et al, “Surviving SoC Revolution”, Kluwer Academic Publishers, F. Balarin et al, "Hardware/Software Codesign: The POLIS Approach", Kluwer Academic Publishers, Papers from IEEE/ACM sponsored journals, Conferences, and Workshops

Design & Co-design of Embedded Systems 10 Very Important Notes Honor code! –200% penalty for both sides! Devise a plan for your project –Very strictly follow your plan –NO LATE ORAL PRESENTATION/FINAL REPORT WILL BE ACCEPTABLE. NO EXCEPTION. 

Design & Co-design of Embedded Systems 11 To Be Announced Detailed Schedule of the Course Course Web-page List of Reading Assignments List of Projects