Computer Organization

This module surveys the physical resources of a computer system.  Basic components  CPU  Memory  Bus  I/O devices  CPU structure  Instruction cycle  Disk geometry

Basic Architecture u Processor (CPU) u Main Memory  volatile u I/O devices  secondary memory  communications  terminals u System interconnection  a bus is used to exchange data and control information CPUMemory System Bus Disk Controller Network Controller Serial Device Controller

Interconnection: the bus u Conceptually, a collection of parallel wires, each of which is dedicated to carrying one of  data  address  control (of access to the bus) u Only one component can “write” to a particular wire of the bus at a time data address control

CPU and the Memory u The Central Processing Unit (CPU)  responsible for instruction execution  determines how the memory is to be modified  contains a few data container called registers u The Main Memory  large collection of data containers  each is labeled with a positive integer called its address u For each instruction, the CPU fetches input data from registers or memory, then writes output to a register or memory location

Central Processing Unit u Arithmetic logic unit (ALU)  performs arithmetic and logic operations u Control unit  reads and decodes instructions  initiates execution of instruction by proper component u Registers  some have special purpose CPU ALUControl PC IR PSW AR CP DP SP CL DL v0 a0s0s1s2s3

Fetch-Decode-Execute Cycle u The CPU is endlessly looping through these steps  Actual steps will vary from processor to processor u Simple model 1. fetch the next instruction 2. decode the instruction & load its data from registers 3. execute the instruction 4. read from memory, or write to memory 5. write to registers

Device Controllers u Devices are not connected directly to the system bus u Each device has a device controller between it and the system bus u One controller may have multiple devices u For example: SCSI devices, IDE devices, USB devices CPUMemory System Bus Disk Controller Network Controller Serial Device Controller

I/O Devices u Each device has a buffer which mediates data transfer. u Transfer between memory and devices is limited by the size and speed of the data bus. u For example, though a disk reads data to its buffer one block at a time, transfer to memory is one word at a time. CPUMemory System Bus Device Controller buffer

Disk Structure u Disk drives are addressed as large 1-dimensional arrays of logical blocks, where the logical block is the smallest unit of transfer  Like a big random-access file where each record is a logical block u The 1-dimensional array of logical blocks is mapped into the sectors of the disk sequentially.  Sector 0 is the first sector of the first track on the outermost cylinder.  Mapping proceeds in order through that track, then the rest of the tracks in that cylinder, and then through the rest of the cylinders from outermost to innermost.

Disk Device u Accessing data on disk requires waiting  For the disk to spin to the proper location  Rotational latency  For the read/write heads to move to the proper location  Seek time u Disk access is around times slower than memory access

Uniform sector mapping Track 2, Sector 7 Track 0, Sector 0 u Sectors stored in the outer tracks use more space to store the same number of bits as the inner tracks  This is somewhat wasteful u The disk spins at a constant angular velocity  rpm’s

Zoned Bit Density u The tracks are divided into zones  There are more sectors in outer zones than in inner zones u This leads to a more efficient use of disk space u The disk still spins at a constant angular velocity  But outer tracks have more bits per rotation, and so are read faster