Image Compression With Discrete Cosine Transforms Midterm Report – (11/02/99) David Oltmanns Delayne Vaughn John Hill
Modification to original plan Results/partial results obtained Updated Time-chart Difficulty Levels References Contents Image Compression With Discrete Cosine Transforms
Hardware Software Modifications Use serial interface – to transfer image from the PC to the FPGA.
Hardware Software Modifications
Hardware Software Results Original QuickCam Interface Using Basic Stamp 3
Hardware Software Results Serial Interface using UART
Hardware Software Results Image Compression using Discrete Cosine Transforms
Hardware Software Results Quantization Factor of 15
Hardware Software Results Quantization Factor of 75
Hardware Software Results Quantization Factor of 255
Timeline Changes Week Three Sept Research DCT and sub-systems Begin Proposal Week FourSept Finalize Proposal Present Proposal (Sept. 21) Begin Software Compression Algorithm Week FiveSept Oct. 2 Finish Software Compression Algorithm Begin Software Decompression Algorithm Integrate Compression/Decompression Software Components Begin Serial Interface Module Week Six Oct Finish Software Compression Algorithm Continue Serial Interface Module Begin SRAM Control Module Biweekly Report 1 (Oct. 7) Week SevenOct Finish Serial Interface Module (FPGA Change) Finish SRAM Control Module Begin FPGA Compression Module Week EightOct Finish FPGA Compression Module Integrate SRAM, Serial Interface, and Compression Modules Biweekly Report 2 (Oct. 21) Week NineOct Begin FPGA Decompression Module Begin Camera Interface Begin Mid-term Presentation Week TenOct Nov. 6 Finish FPGA Decompression Module Mid-term Presentation (Nov. 4) Integrate Decompression and Compression Modules Week ElevenNov Finish Camera Interface Integrate Camera Interface with Existing Modules Week TwelveNov Existing Modules Benchmark: Camera Interface with Existing Modules Biweekly Report 3 (Nov. 18) Week ThirteenNov Begin Final Presentation Thanksgiving Week FourteenNov Dec. 3 Overflow (Unforeseen Tasks) Finalize Presentation Week FifteenDec Final Presentation (Dec. 7) ON HOLD CHANGE ON HOLD
Difficulty Levels ( 1- very difficult, 4- very easy) Project Implementation Hardware (BS2)3 Hardware (Serial)2 Algorithm (Software)2 Algorithm (Verilog)3 Team Coordination Scheduling Meetings 3 Group Work 4 Lab Support 3
N. Ahmed, T. Natarajan, and K.R. Rao, "Discrete cosine transform," IEEE Trans. Comput., vol. C-23, pp Jan K. Aldrich, D. Brandenberger, C. Chilek, and B. Raymond, "Sign Language Aquisition and Recognition System," info/cpsc483/common/99b/g3/Final.htm (Sept. 20, 1999) M. Berger, J. Curtin, T. Griffin, A. King, M. Nordfelt, and J. Whitted, "Portable Digital Compression/Decompression System," info/cpsc483/common/99a/g5/g5.html (Sept. 20, 1999) J. Berglund, R. Cuaycong, W. Day, A. Fikes, and K. Shah, "Autonomous Tracking Unit," info/cpsc483/common/99a/g1/g1.html (Sept. 20, 1999) N.I. Cho and S.U. Lee, "Fast algorithm and implementation of 2-D discrete cosine transform," IEEE Trans. CAS, Mar. 1991, pp cosine transform," IEEE Trans. CAS, Mar. 1991, pp N.I. Cho and I.D. Yun, and S.U. Lee, "On the regular structure for the fast 2D DCT algorithm," IEEE Trans. CAS, Apr. 1993, pp S.C. Chan and K.L. Ho, "A new 2D fast cosine transform algorithm," IEEE Trans. SP, Feb. 1991, pp H.S. Hou, "A fast recursive algorithm for computing the discrete cosine transform," IEEE Trans. ASSP, Oct. 1987, pp C.W. Kok, "Fast Algorithm for Computing 2D Discrete Cosine Transform," Unpublished article, pp. 1-4 R. Mahapatra, A. Kumar, and B. Chatterji, "Performance Analysis of 2-D Inverse Fast Cosine Transform Employing Multiprocessors," Article, pp (location for DCT info 10/2/99) (location for Huffman encoding info. 10/2/99) Past Project Groups Sign Language Acquisition and Recognition System Sign Language Acquisition and Recognition System Portable Digital Compression/Decompression System Portable Digital Compression/Decompression System References Image Compression With Discrete Cosine Transforms