P1801 – Merging of Power Domains Gary Delp. 2 Draft - proposal provided to P1801 (and other groups) by LSI - #include LSI Confidential Purpose Provide.

Slides:



Advertisements
Similar presentations
CSTS Service Instance Identification Summary of CSTS Discussions on M.Götzelmann.
Advertisements

1 Integration Testing CS 4311 I. Burnstein. Practical Software Testing, Springer-Verlag, 2003.
Ch.6: Requirements Gathering, Storyboarding and Prototyping
Work Breakdown Structures. Purpose The WBS shows different levels within the product hierarchy. For Government program managers levels 1-3 are of prime.
ObjectivesObjectives 1.A definition of planning and an understanding of the purposes of planning 2.Insights into how the major steps of the planning.
© Prentice Hall, © Prentice Hall, ObjectivesObjectives 1.A definition of planning and an understanding of the purposes of planning.
Aki Hecht Seminar in Databases (236826) January 2009
Oct 26, 2004CS573: Network Protocols and Standards1 IP: Routing and Subnetting Network Protocols and Standards Autumn
HAS. Patterns The use of patterns is essentially the reuse of well established good ideas. A pattern is a named well understood good solution to a common.
1 Minggu 2, Pertemuan 3 The Relational Model Matakuliah: T0206-Sistem Basisdata Tahun: 2005 Versi: 1.0/0.0.
Business research methods: data sources
Assigned Question: To what extent can CME initiation be predicted without detailed understanding of the CME initiation physics? (i.e., what is the usefulness.
Chapter 29 conducting marketing research Section 29.1
BIS310: Week 7 BIS310: Structured Analysis and Design Data Modeling and Database Design.
SEEA Experimental Ecosystem Accounts: A Proposed Outline and Road Map Sixth Meeting of the UN Committee of Experts on Environmental-Economic Accounting.
Protocols and the TCP/IP Suite Chapter 4. Multilayer communication. A series of layers, each built upon the one below it. The purpose of each layer is.
(1) Programming Mechanics © Sudhakar Yalamanchili, Georgia Institute of Technology, 2006.
An Object-Oriented Approach to Programming Logic and Design
IAY 0600 Digital Systems Design
Protocols and the TCP/IP Suite
SOFTWARE DESIGN AND ARCHITECTURE LECTURE 07. Review Architectural Representation – Using UML – Using ADL.
Interaction Modeling. Introduction (1) Third leg of the modeling tripod. It describes interaction within a system. The class model describes the objects.
Learningcomputer.com SQL Server 2008 Configuration Manager.
1 IRES, Chapter 8 Energy Balance Vladimir Markhonko United Nations Statistics Division The Oslo Group on Energy Statistics Fifth meeting, Cork, Ireland,
© 2003 Xilinx, Inc. All Rights Reserved For Academic Use Only Xilinx Design Flow FPGA Design Flow Workshop.
UML Diagrams: Class Diagrams The Static Analysis Model Instructor: Dr. Hany H. Ammar Dept. of Computer Science and Electrical Engineering, WVU.
Fabric Interfaces Architecture Sean Hefty - Intel Corporation.
EDA Standards – The SPIRIT View Gary Delp VP and Technical Director SPIRIT.
Producer Questions 6 December Producer Questions 2 Purpose The SIP standard envisions the development of a formal model of the data for.
Notes of Rational Related cyt. 2 Outline 3 Capturing business requirements using use cases Practical principles  Find the right boundaries for your.
The Static Analysis Model Class Diagrams Prof. Hany H. Ammar, CSEE, WVU, and Dept. of Computer Science, Faculty of Computers and Information, Cairo University.
Judith Richardson NXP Semiconductors, Corporate I&T, Design Technology and Flows August 21, 2007 UPF examples.
IFS310: Module 6 3/1/2007 Data Modeling and Entity-Relationship Diagrams.
Relationships Relationships between objects and between classes.
Fabric Interfaces Architecture Sean Hefty - Intel Corporation.
OSLC PLM Reference model April Summary of the OSLC PLM Reference Model V0.4 April 4th 2011 Gray Bachelor Mike Loeffler OSLC PLM Workgroup.
1 Integration Testing CS 4311 I. Burnstein. Practical Software Testing, Springer-Verlag, 2003.
© ABB University - 1 Revision B E x t e n d e d A u t o m a t i o n S y s t e m x A Chapter 21 Function Designer Course T314.
1 Introduction to VHDL Part 2 Fall We will use Std_logic And, Or have same precedence See slide 8 of part 1.
P Dec-15 IEEE P1801 Working Group (Unified Power Format – UPF) Status Stephen Bailey Chair, P1801 Working Group.
Department of Electronic Engineering City University of Hong Kong EE3900 Computer Networks Protocols and Architecture Slide 1 Use of Standard Protocols.
Lecture 2 System Development Lifecycles. Building a house Definition phase Analysis phase Design phase Programming phase System Test phase Acceptance.
Way beyond fast © 2002 Axis Systems, Inc. CONFIDENTIAL Axis Common Transaction Interface (CTI) Architecture Highlights 9/11/2003 Ching-Ping Chou Axis Systems,
Introduction to Active Directory
The FDES revision process: progress so far, state of the art, the way forward United Nations Statistics Division.
Web page design. Web Site Design Principles Design for the Medium What is meant by Hyper Media? Hypertext links.
Slide 1 2/22/2016 Policy-Based Management With SNMP SNMPCONF Working Group - Interim Meeting May 2000 Jon Saperia.
1 Device Controller I/O units typically consist of A mechanical component: the device itself An electronic component: the device controller or adapter.
IETF YANG models for VLAN interface classification draft-wilton-netmod-intf-vlan-yang Robert Wilton (Cisco)
IAY 0600 Digital Systems Design VHDL discussion Structural style Modular design and hierarchy Part 1 Alexander Sudnitson Tallinn University of Technology.
OSLC PLM Reference model February Summary of the OSLC PLM Reference Model V0.2 February 22 nd 2011 Gray Bachelor Mike Loeffler OSLC PLM Workgroup.
Aleksandra Pawlik University of Manchester. Something that can be put into a workflow Well described - what the component does Behaves “well” - conforms.
PART1 Data collection methodology and NM paradigms 1.
UNIT-IV Designing Classes – Access Layer ‐ Object Storage ‐ Object Interoperability.
Structural style Modular design and hierarchy Part 1
UML Diagrams: Class Diagrams The Static Analysis Model
P2MP MPLS-TE Fast Reroute with P2MP Bypass Tunnels
Structural style Modular design and hierarchy Part 1
Understand the OSI Model Part 2
Oracle Solaris Zones Study Purpose Only
Object Oriented Analysis and Design
Structural style Modular design and hierarchy Part 1
IAY 0600 Digital Systems Design
DNS and DHCP Configuration
Integration Testing CS 4311
Introduction to Pattern Oriented Analysis and Design (POAD)
2017 P4 SBB & HMT Parents’ Briefing.
Design Yaodong Bi.
Using Selection Filters in JMP® 12
A Simple Template for Strategy
Presentation transcript:

P1801 – Merging of Power Domains Gary Delp

2 Draft - proposal provided to P1801 (and other groups) by LSI - #include LSI Confidential Purpose Provide motivation for the provision of a command in 1801 to merge power domains Outline Top down and bottom up flows – agree on terms Packaged Electronic Design IP in the flow The command Before and after state of the data objects An additional (implicit) data object, the power element collection

3 Draft - proposal provided to P1801 (and other groups) by LSI - #include LSI Confidential Top down and bottom up flows – agree on terms A Top down flow is a flow which starts with the general, and then through progressive refinement proceeds to the end goal. –All objects are created within their context –Advantages: –Disadvantages: A bottom up flow is a flow which starts at the detailed component then combines fully elaborated components into a design. –Advantages: –Disadvantages: An IP delivery flow is a flow which supports the development of components separate from designs (using the IP-XACT component and design objects, where hierarchy allows components to include instances of designs, and designs to include multiple (and differently configured) instances of components. The component is the unit of delivery. –Advantages: –Disadvantages:

4 Draft - proposal provided to P1801 (and other groups) by LSI - #include LSI Confidential Packaged Electronic Design IP in the flow When designing IP (a component), the assumed context must be able to be defined. –Set port related supply –The context is a rich one, with the potential of multiple domains and control signals When the IP (component) is incorporated into a design, the elements of the component will be incorporated into extent of the design. The domains of the component may also be usefully be incorporated into the domains of the “parent” design Beautiful Build coming, watch this space; it starts out as An IP block with 3 domains. That block gets included twice in a design The domains are merged into the parent domains.

5 Draft - proposal provided to P1801 (and other groups) by LSI - #include LSI Confidential The command Option A is recommended, Option B has been discussed, but considered dangerous Merge_domains –parent_domain XXX –child_domains [YYY, …] –It is a error if any of the specified power supplies from the child domain are different than those in the parent domain. –After the merge command: The child domain names remain available for simulation and probing (get) purposes –A) but refer to the state of the parent domain. –B) and continue to refer to only the elements of that child domain It is an error if subsequent commands attempt to connect power supplies to the child domains Any assignments to the parent domain will have effect over all of the elements merged. (It is an error if any subsequent commands change the value set by earlier commands (command layering semantics) –A) All elements in the parent domain share the same supply specifications –B) The child domain may have different secondary supplies (biases, etc) from the primary

6 Draft - proposal provided to P1801 (and other groups) by LSI - #include LSI Confidential Before and after state of the data objects Before, child domain is primary domain object After, child domain is a –A) Alias for the primary domain but may not be used to set supplies –B) a reference to the subset of the elements that came from the child domain

7 Draft - proposal provided to P1801 (and other groups) by LSI - #include LSI Confidential An additional (implicit) data object, the power element collection Not clear that this object is ripe…