Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 2: August 29, 2014 Transistor Introduction

Today MOSFET Capacitive and resistive loads Zero-th order transistor model –Good enough for [what?] Diagnostic Quiz (12:40pm) Penn ESE370 Fall DeHon 2

MOSFET Metal Oxide Semiconductor Field Effect Transistor –New device –Primary active component for the term –Three terminal device Voltage at gate controls conduction between two other terminals (source, drain) Penn ESE370 Fall DeHon 3

MOSFET Ids vs. Vgs, Vds Penn ESE370 Fall DeHon 4 I DS Vgs = Vg-VsVds = Vd-Vs

MOSFET I vs. Vgs, Vds Will dig into understanding during term Today: simple ways to reason about gross behavior –Static/DC Penn ESE370 Fall DeHon 5

Preclass What voltage do the cases converge to? Penn ESE370 Fall DeHon 6

Final Voltage? Penn ESE370 Fall DeHon 7

Final Voltage? Penn ESE370 Fall DeHon 8

Final Voltage? Penn ESE370 Fall DeHon 9

Final Voltage? Penn ESE370 Fall DeHon 10

Conclude? DC/Steady-State –Ignore the capacitors –Look like “open circuit” Penn ESE370 Fall DeHon 11

Quasistatic Static – inputs (and circuit) unchanging, how does it settle? Dynamic – what happens when things change Quasi-Static – inputs transition, circuit responds, and settles –Dynamic transition to roughly static states Penn ESE370 Fall DeHon 12

Quasistatic Relevance? How relevant to a combinational digital circuit? How relevant to a clocked digital circuit? Penn ESE370 Fall DeHon 13

Zero-th Order MOSFET Ideal Switch Vgs > Vth  conducts Vgs < Vth  does not conduct Vth – threshold voltage Gate draws no current from input –Loads input capacitively Penn ESE370 Fall DeHon 14

Zero-th Order MOSFET Penn ESE370 Fall DeHon 15 I DS Vgs = Vg-Vs

N-Type, P-Type MOSFET N – negative carriers –electrons Switch turned on positive Vgs P – positive carriers –holes Switch turned on negative Vgs Penn ESE370 Fall DeHon 16 Vthp<0 Vgs<Vthp to to conduct

Electrons and Holes Penn ESE370 Fall DeHon 17

Symmetry Device is symmetric Doesn’t know source from drain Think of it as a resistor: –Also doesn’t know difference between two ends –Which way does current flow? N-type: –Electrons are carriers –Electrons charged? negative –Electrons flow from src  drain –From which voltage? Lowest voltage  highest –Drain is ? most positive terminal Penn ESE370 Fall DeHon 18

Symmetry Device is symmetric Doesn’t know source from drain Think of it as a resistor: –Which way does current flow? P-type: –Holes are carriers –Holes charged how? positively –Holes flow from src  drain –From which voltage? Highest voltage  lowest –Drain is? most negative terminal Penn ESE370 Fall DeHon 19

Zero-th Order MOSFET Penn ESE370 Fall DeHon 20 I DS

Why zero-order useful? Penn ESE370 Fall DeHon 21 Note S, D annotation on this slide (won’t be labeled in future) Why is it this way?

What happens when Vin=Vdd>Vthn Penn ESE370 Fall DeHon 22 Vthp=-Vthn Vgs = Vg-Vs

What happens when Vin=Vdd>Vth Penn ESE370 Fall DeHon 23 Vgs=Vg-Vs=Vdd > Vthn Vthp=-Vthn

What happens when Vin=Vdd>Vth Penn ESE370 Fall DeHon 24 Vgs=Vdd > Vth Vthp=-Vthn

What happens when Vin=Vdd>Vth Penn ESE370 Fall DeHon 25 Vgs=Vdd > Vth Vgs=0 > Vthp Vthp=-Vthn

What happens when Vin=Vdd>Vth Penn ESE370 Fall DeHon 26 Vgs=Vdd > Vthn Vgs=0 > Vthp Vthp=-Vthn

What happens when Vin=Vdd>Vth Penn ESE370 Fall DeHon 27 Vgs=Vdd > Vthn Vgs=0 > Vthp V2=Gnd Vthp=-Vthn

What happens when Vin=Vdd>Vth Penn ESE370 Fall DeHon 28 Vgs=Vdd > Vthn Vgs=0 > Vthp V2=Gnd Vgs=0 < Vthn Vthp=-Vthn

What happens when Vin=Vdd>Vth Penn ESE370 Fall DeHon 29 Vgs=Vdd > Vthn Vgs=0 > Vthp V2=Gnd Vgs=0 < Vthn Vthp=-Vthn Vgs=-Vdd < Vthp

What happens when Vin=Vdd>Vth Penn ESE370 Fall DeHon 30 Vgs=Vdd > Vthn Vgs=0 > Vthp V2=Gnd Vgs=0 < Vthn Vgs=-Vdd < Vthp Vout=Vdd Vthp=-Vthn

What happens when Vin=0<Vth Penn ESE370 Fall DeHon 31 Work on board

What happens when Vin=0<Vth Penn ESE370 Fall DeHon 32 V2=Vdd Vout=0

What function? Buffer Vin=Vdd  Vout=Vdd Vin=0  Vout=0 Penn ESE370 Fall DeHon 33

Why Zeroth Order Useful? Allows us to reason (mostly) at logic level about steady-state functionality of typical gate circuits Make sure understand logical function (achieve logical function) before worrying about performance details Penn ESE370 Fall DeHon 34

Why adequate? Static analysis – can ignore capacitors Capacitive loads – resistances don’t matter Feed forward for gates – –don’t generally have loops –can work forward from known values Logic drive to voltage rails (rail-to-rail) –Don’t have to reason about intermediate voltage levels Penn ESE370 Fall DeHon 35

What not tell us? Delay Dynamics Behavior if not –Capacitively loaded –Acyclic (if there are Loops) –Rail-to-rail drive Penn ESE370 Fall DeHon 36

Big Ideas MOSFET Transistor as switch Purpose-driven simplified modeling –Aid reasoning –Sanity check –Simplify design Penn ESE370 Fall DeHon 37

Admin HW1 out –Can reason through pr 1 from today’s lecture –Try to work over weekend Monday holiday: Labor Day Office Hours –Prof. (Levine 270) T 4:15-5:30pm –(poll for TA office hours on Wed.) Advice Reminder: Should be thinking about this course every day. Penn ESE370 Fall DeHon 38

Diagnostic Quiz Turnin Quiz and feedback before leaving (do not turnin preclass  keep that) Penn ESE370 Fall DeHon 39