In1211/04-PDS 1 TU-Delft IA-32

In1211/04-PDS 2 TU-Delft IA family l IA (Intel Architecture) is a family of processors (1985), (1989), -Pentium-line ( ) l Each processor has the same architecture, but different organization -same instruction set -different performance levels l 32-bit memory addresses and variable length instructions l Very large instruction set (not really RISC)

In1211/04-PDS 3 TU-Delft

In1211/04-PDS 4 TU-Delft Other Example: PowerPC Floating-point unit Integer unit Instruction unit instructions Cache main memory

In1211/04-PDS 5 TU-Delft Floorplan PowerPC

In1211/04-PDS 6 TU-Delft FPU Data Cache Instr. Cache Registers MMU Load/Store Unit

In1211/04-PDS 7 TU-Delft IA register structure FP0 FP7 floating - point registers R0 R7 general- purpose registers

In1211/04-PDS 8 TU-Delft Special registers Code Segment CS Stack Segment SS DS ES FS GS Data Segments

In1211/04-PDS 9 TU-Delft Status Register OFIF Status Register CFTFSFZF 6789 CFCarry ZFZero SFSign IOPLI/O privilege level OFOverflow IFInterrupt enable IOPL

In1211/04-PDS 10 TU-Delft Addressable data units byte 3byte 0 310Bit Byte Doubleword 0

In1211/04-PDS 11 TU-Delft Memory l Memory is byte addressable l Doublewords can start at any byte location l Data Operands are 8 or 32 bits wide l Mode is little-endian scheme (cf big-endian PowerPC)

In1211/04-PDS 12 TU-Delft Register Naming R0EAX R1ECX R2EDX R3EBX R4 ESP R5 EBP R6 ESI R7 EDI EIP EFLAGS Data registers Pointer registers Index registers Instruction Pointer Status Register

In1211/04-PDS 13 TU-Delft Instructions l Variable length instructions 1-12 bytes l Five type of instructions -Copy instructions (MOV) -Arithmetic and logic instructions -Flow control -Processor control instructions -I/O instructions Format: INSTR Rdst,Rsrc

In1211/04-PDS 14 TU-Delft Instruction Format OpcodeAddressingDisplacementImmediate 1 or 2 bytes 1 or 4 bytes

In1211/04-PDS 15 TU-Delft Addressing modes l Many addressing modes: -Immediatevalue -DirectM(value) -Register[reg] -Register IndirectM([reg]) -Base with displacementM([reg]) +Disp -Index with displacementM([reg]  S +Disp) -Base with indexM([reg]+[reg]  S) -Base with index and M([reg]+[reg]  S+Disp) displacement S=1,2,4 or 8Disp= 8 or 32-bit signed number

In1211/04-PDS 16 TU-Delft Immediate and Direct l Immediate MOV EAX, 25 [EAX]  #25 MOV EAX, 3FA00H [EAX]  # 3FA00H l Direct MOV EAX, loc [EAX]  M(loc) or MOV EAX, [loc] [EAX]  M(loc)

In1211/04-PDS 17 TU-Delft Register indirect l Register MOV EBX,OFFSET loc [EBX]  #loc or LEA EBX,loc [EBX]  #loc l Register indirect MOV EAX,[EBX] [EAX]  M(EBX)

In1211/04-PDS 18 TU-Delft Base with Index and Displacement MOV EAX,[EBP+ESI*4+200] EAX  M([EBP] + [ESI]*4 + #200) Operand EBP ESI

In1211/04-PDS 19 TU-Delft Arithmetic instructions l May have one or two operands ADD dst,scr meaning [dst]  [dst] + [src]

In1211/04-PDS 20 TU-Delft Summation example LEAEBX, NUM1[EBX]  #NUM1 MOVECX, N[EXC]  M(N) MOVEAX, 0[EAX]  #0 MOVEDI, 0[EDI]  #0 L:ADDEAX, [EBX+EDI*4]Add next number to EAX INCEDI[EDI]  [EDI] +1 DECECX[ECX]  [ECX] -1 JGLBranch if [ECX]>0 MOVSUM, EAXM(SUM)  [EAX]

In1211/04-PDS 21 TU-Delft Flow control l Two basic branch instructions: l JMP[loc]Branch unconditionally l JG, JZ, JS, etc Branch if condition is satisfied

In1211/04-PDS 22 TU-Delft Compare l Used to compare values and leave register contents unchanged CMPdst, src[dst] - [src]

In1211/04-PDS 23 TU-Delft Sorting example int[] listarray = new list[n]; int temp; for(j=n-1, j>0, j--){ for(k=j-1, k>=0, k--){ if(list[j] > list[k]) { temp = list[k]; list[k] = list[j]; list[j] = temp; }

In1211/04-PDS 24 TU-Delft Assembler code LEAEAX, list[EAX]  #list MOVEDI, N[EDI]  n DECEDI [EDI]  n-1 init(j) outer:MOVECX, EDI[ECX]  j DECECX [ECX]  j-1 init (k) MOVDL, [EAX+EDI]load list(j) into DL inner:CMP[EAX+ECX], DLcompare list(k) to list(j) JLEnextif list(j) >= list(k) XCNG[EAX+ECX], DLswap MOV[EAX+ECX], DL new list(j) in DL next:DECECXdecrement k JGEinnerrepeat or terminate DECEDIdecrement j JGEouterrepeat or terminate

In1211/04-PDS 25 TU-Delft Question l Why is this assembler program an incorrect translation of the Java program?

In1211/04-PDS 26 TU-Delft Subroutines CALL sub [EIP]  #sub l Return address is saved in on stack (ESP register) Return is RET [EIP]  [EDI]

In1211/04-PDS 27 TU-Delft Stack instructions l ESP register is used as stack pointer PUSH src [ESP]  [ESP] - #4 M([ESP])  [src] POP dst [dst]  M([ESP]) [ESP]  [ESP] + #4 PUSHAD (POPAD): push (pop) all 8 registers on (from) stack

In1211/04-PDS 28 TU-Delft Stack frames.... PUSH NParameter n on stack 2000CALLSub1Call subroutine at EDI EPI10052 Sub1 starts at address 2400 Stack Pointer Stack

In1211/04-PDS 29 TU-Delft Subroutine Sub1 Sub1:PUSHEDASave EDA PUSHEDBSave EDB MOVEDA, [EDI + 12]n to EDA DECEDA.... PUSHEDALoad n-1 on stack L:CALLSub2Call subroutine POPNPut result in M(N) POPEDBRestore EDA POPEDARestore EDB RETreturn

In1211/04-PDS 30 TU-Delft Stack frame in Sub1 EDB EDA Return Address n ? EDI EIP Stack frame at arrow previous slide 10036

In1211/04-PDS 31 TU-Delft Question l What is the value op EIP?

In1211/04-PDS 32 TU-Delft Subroutine Sub1 2400PUSHEDASave EDA PUSHEDBSave EDB MOVEDA, [EDI + 12]n to EDA DECEDA.... PUSHEDALoad n-1 on stack L:CALLSub2Call subroutine POPNPut result in M(N) POPEDBRestore EDA POPEDARestore EDB RETreturn

In1211/04-PDS 33 TU-Delft Stack frame in Sub1 Stack frame at arrow previous slide [EDB] [EDA] Return Address n ? EIP n-1 EDA EIP

In1211/04-PDS 34 TU-Delft Subroutine Sub1 2400PUSHEDASave EDA PUSHEDBSave EDB MOVEDA, [EDI + 12]n to EDA DECEDA.... PUSHEDALoad n-1 on stack L:CALLSub2Call subroutine POPNPut result in M(N) POPEDBRestore EDA POPEDARestore EDB RETreturn

In1211/04-PDS 35 TU-Delft Stack frame in Sub1 Stack frame at arrow previous slide n-1 [EDB] [EDA] Return Address n ? EIP n-1 EDA EIP

In1211/04-PDS 36 TU-Delft Subroutine Sub2 Sub2:MOVEDA, [EDI+4] DECEDA MOV[EDI+4], EDA RET

In1211/04-PDS 37 TU-Delft Stack frame in Sub2 Stack frame at arrow previous slide Return Address n-1 [EDB] [EDA] Return Address n ? EIP n-2 EDA EIP

In1211/04-PDS 38 TU-Delft Subroutine Sub2 Sub2:POPEDA DECEDA PUSHEDA RETreturn Sub2:MOVEDA, [EDI+4] DECEDA MOV[EDI+4], EDA RET

In1211/04-PDS 39 TU-Delft Stack frame in Sub2 Stack frame at arrow previous slide Return Address n-2 [EDB] [EDA] Return Address n ? EIP n-2 EDA EIP