Advanced Computer Architecture & Processing Systems Research Lab Framework for Automatic Design Space Exploration.

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Presentation transcript:

Advanced Computer Architecture & Processing Systems Research Lab Framework for Automatic Design Space Exploration of Computer Systems Horia Calborean Prof. Lucian Vinţan

2 Advanced Computer Architecture & Processing Systems Research Lab Outline Design space exploration  Multi-objective optimization  Metrics used Methodology and tools  Framework for Automatic Design Space Exploration (FADSE)  GAP Results  Results reuse  Algorithm comparison Conclusions

3 Advanced Computer Architecture & Processing Systems Research Lab Design space exploration (DSE) Number of architectural parameters has risen Huge number of possible configurations  50 parameters with 8 values => possible configurations Exhaustive evaluation impossible Manual design space exploration infeasible Solution: heuristic search algorithms

4 Advanced Computer Architecture & Processing Systems Research Lab Multi-objective DSE Performance evaluation has become a complex multi-objective evaluation (speed, power consumption, area integration, etc.) Multi-objective search algorithms are used Problem: no order can be established between the individuals

5 Advanced Computer Architecture & Processing Systems Research Lab Basic notions about Pareto front

6 Advanced Computer Architecture & Processing Systems Research Lab Metrics used: hypervolume Does not require the true Pareto front to be known Volume enclosed by:  the current Pareto front approximation and  the hypervolume reference point

7 Advanced Computer Architecture & Processing Systems Research Lab Metrics used: coverage of two sets Returns the fraction of individuals produced by one algorithm that dominates individuals produced by the other algorithm.

8 Advanced Computer Architecture & Processing Systems Research Lab FADSE Integrates many DSE algorithms (through jMetal library):  NSGA-II, SPEA2, SMPSO, OMOPSO, etc. Can connect to many simulators: M5, MSIM2, MSIM3, Multi2Sim, GAP, GAPtimize, UniMap Other simulators can be easily integrated

9 Advanced Computer Architecture & Processing Systems Research Lab Accelerating the DSE process: parallel evaluation Client-server application Evaluations are one in parallel Results are sent back asynchronous At the end of the generation: synchronization point

10 Advanced Computer Architecture & Processing Systems Research Lab Accelerating the DSE process: results reuse Algorithms tend to generate the same individuals again  Can be reused => avoid simulation Can use results from previous explorations

11 Advanced Computer Architecture & Processing Systems Research Lab Reliable Clients / simulators crash:  Implemented watchdog timer Network connection lost:  Server resends simulations Server crashed, power loss:  Implemented checkpoint mechanism

12 Advanced Computer Architecture & Processing Systems Research Lab Easily configurable XML interface:  Describe the parameters for the connector  Describe the parameters for the simulator Arithmetic progression, geometric progression (ratio 2), list of strings  Configure database connection  Specify constraints

13 Advanced Computer Architecture & Processing Systems Research Lab Constraints specification  

14 Advanced Computer Architecture & Processing Systems Research Lab FADSE

15 Advanced Computer Architecture & Processing Systems Research Lab Grid Alu Processor (GAP)  Novel processor architecture from the University of Augsburg, combines coarse-grained reconfigurable array of functional units with superscalar-like frontend  Design space of over 1.1*10 6 Two objectives to be minimized: speed (CPI) and complexity (Jahr et al.(2011))

16 Advanced Computer Architecture & Processing Systems Research Lab This work  Analyze the influence of the results reuse on the DSE process  Comparison of three well known DSE algorithms

17 Advanced Computer Architecture & Processing Systems Research Lab Number of simulated individuals VS number of generated individuals – NSGA-II 60% reuse after 100 generations

18 Advanced Computer Architecture & Processing Systems Research Lab New individuals generated VS new individuals added to the next population

19 Advanced Computer Architecture & Processing Systems Research Lab Hypervolume on GAP

20 Advanced Computer Architecture & Processing Systems Research Lab Coverage NSGA-II and SPEA2 on GAP

21 Advanced Computer Architecture & Processing Systems Research Lab Coverage NSGA-II and SMPSO on GAP

22 Advanced Computer Architecture & Processing Systems Research Lab Pareto front approximation over the generations

23 Advanced Computer Architecture & Processing Systems Research Lab Conclusions SMPSO finds better results Database integration allows a faster DSE process FADSE is a flexible tool:  Many algorithms can be selected  Connects to many simulators

24 Advanced Computer Architecture & Processing Systems Research Lab Further work Insert known good configurations at the beginning of the search Domain knowledge using fuzzy rules, constraints Integration with UniMap

Advanced Computer Architecture & Processing Systems Research Lab Thank you Questions